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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-02-27 08:15:01 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-02-28 10:35:22 +0000 |
| commit | 035876c4ddb0c9cb92b867bc329f74f1021bf0f7 (patch) | |
| tree | 65320a3668d3c4346fc0d6638a36cf64f6e3cfbd /.clang-format | |
| parent | 7ba14406c30f90cebde9f539f1987348cfc998e4 (diff) | |
| download | coreboot-035876c4ddb0c9cb92b867bc329f74f1021bf0f7.tar.xz | |
mb/intel/saddlebrook: Fix 2nd DIMM slot
Assumed broken during review and rebase. The
SPD at address 0x52 will appear at index 1.
Change-Id: I213853d2b981294554d8d1b254da476905a41c13
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31630
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to '.clang-format')
0 files changed, 0 insertions, 0 deletions