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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-09-06 10:46:36 -0600
committerMartin Roth <martinroth@google.com>2017-09-13 19:01:36 +0000
commite2697de821ed1f97199ce3bc08cb85b396c96715 (patch)
tree828daf53f0fcd01e35890d1487383d0bdcf86517 /.clang-format
parentb00ba2ae6bd9da0f03dfecd63504e92e1e221095 (diff)
downloadcoreboot-e2697de821ed1f97199ce3bc08cb85b396c96715.tar.xz
amd/stoneyridge: Simplify SB link routing
Remove the check for the southbridge link from Stoney Ridge. The APU is an SoC which can never be installed in a multi-node system. It is pointless to detect and remember the sblink value, which is set by hardware and comes up 0. The BKDG marks this as a reserved field vs. documentation for multi-node-capable Family 15h devices. Because there is only one option for SB link now, relocate the register write done by set_vga_enable_reg() and remove the function. Change-Id: Ie4ce6b5aa847a184534224db302437ff8d37c14b Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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