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authorJulius Werner <jwerner@chromium.org>2016-04-06 12:50:40 -0700
committerJulius Werner <jwerner@chromium.org>2016-04-07 20:46:38 +0200
commit2b6db9738ef6d09a068b65ef472c2d54f99abc37 (patch)
treeab43af5cac7b2d75fbb65705b2c43d1db0e45eca /.clang-format
parent2268e0dc15d076c61792b97e954cad3f7c5f8c00 (diff)
downloadcoreboot-2b6db9738ef6d09a068b65ef472c2d54f99abc37.tar.xz
edid: Make framebuffer row alignment configurable
Our EDID code had always been aligning the framebuffer's bytes_per_line (and x_resolution dependent on that) to 64. It turns out that this is a controller-dependent parameter that seems to only really be necessary for Intel chipsets, and commit 6911219cc (edid: Add helper function to calculate bits-per-pixel dependent values) probably actually broke this for some other controllers by applying the alignment too widely. This patch makes it explicitly configurable and depends the default on ARCH_X86 (which seems to be the simplest and least intrusive way to make it fit most cases for now... boards where this doesn't apply can still override it manually by calling edid_set_framebuffer_bits_per_pixel() again). Change-Id: I1c565a72826fc5ddfbb1ae4a5db5e9063b761455 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/14267 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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