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author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2019-09-23 20:59:38 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-09 19:19:46 +0000 |
commit | 8e4654527ef5fec658ca5aacad0612653d3dcf30 (patch) | |
tree | 5cf7d9519334074506d31e0e3fbc446457fe4463 /.clang-format | |
parent | 6d5f007813f6a2ffbdd6a633f31d207672eee2e1 (diff) | |
download | coreboot-8e4654527ef5fec658ca5aacad0612653d3dcf30.tar.xz |
soc/intel/{common,skl,cnl,icl,apl,tgl}: Move HFSTS1 register definition to SoC
Below changes are implemented:
1. Move HFSTS1 register definition to SoC since HFSTS1 register definition
is specific to a SoC. Moving structure back to SoC specific to avoid
unnecessay SoC specific macros in the common code.
2. Define a set of APIs in common code since CSE operation modes and
working states are same across SoCs.
cse_is_hfs1_com_normal(void)
cse_is_hfs1_com_secover_mei_msg(void)
cse_is_hfs1_com_soft_temp_disable(void)
cse_is_hfs1_cws_normal(void)
3. Modify existing code to use callbacks to get data of me_hfs1 structure.
TEST=Build and Boot hatch, soraka, tglrvp, bobba and iclrvp boards.
Change-Id: If7ea6043d7b5473d0c16e83d7b2d4b620c125652
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to '.clang-format')
0 files changed, 0 insertions, 0 deletions