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author | PH Hsu <ph.hsu@mediatek.com> | 2016-05-17 08:47:56 +0800 |
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committer | Martin Roth <martinroth@google.com> | 2016-06-12 12:13:10 +0200 |
commit | cf6526c21135f81acca43d1fcc4566d7c1a86681 (patch) | |
tree | ca6be877a5fd72fc50b86d29a2479bc81b67b748 /.clang-format | |
parent | 99f065fb6eddd46f829a756704a954d60ea201c6 (diff) | |
download | coreboot-cf6526c21135f81acca43d1fcc4566d7c1a86681.tar.xz |
mt8173: dram: Add more sample points to improve dram timing margin
BRANCH=none
BUG=chrome-os-partner:52959
TEST=verified on elm-EVT SKU1/SKU2, Oak-rev5 2GB/4GB models.
Change-Id: I228c629d9a3d6cd8fc5c4e8ba24cc52d5283b4e6
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 3c19e7d
Original-Change-Id: I22356aa8d196c4c126742cfc7e85cc693acd9b39
Original-Signed-off-by: PH Hsu <ph.hsu@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/347716
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15115
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to '.clang-format')
0 files changed, 0 insertions, 0 deletions