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| author | Lubomir Rintel <lkundrak@v3.sk> | 2018-04-14 11:48:27 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-30 06:22:46 +0000 |
| commit | 294446a137aa0477db4c8eb09071b42020e1fe2f (patch) | |
| tree | e23ea2ace30c958486c01f65dc09bec0c6677553 /.gitignore | |
| parent | 9ba8f7c28e23c4064e09a40c383f2713ad955c25 (diff) | |
| download | coreboot-294446a137aa0477db4c8eb09071b42020e1fe2f.tar.xz | |
x86/mpspec: order the I/O APICs by the APIC Id
Linux (4.16) assumes that the PIT interrupt is connected to the pin 0 of the
IOAPIC[0] and panics otherwise.
This might be a Linux bug. The MP Specification 1.4 does seem to mandate
sequential ordering for bus entries, but not for the I/O APICs.
Change-Id: Ibf823eb5b3a29e4590cba915069cdfe5f780edcd
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/25799
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions