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| author | V Sowmya <v.sowmya@intel.com> | 2018-03-15 21:38:30 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-23 08:54:33 +0000 |
| commit | efce854fc69f441f651d3e5a1b9482f366967b01 (patch) | |
| tree | bbc428b205b011d84957b4711b94f9021c062e75 /.gitignore | |
| parent | 57afc5e0f2309ba9f7fbd171642f04c6da9d9976 (diff) | |
| download | coreboot-efce854fc69f441f651d3e5a1b9482f366967b01.tar.xz | |
mb/intel/kblrvp8: Add KBLRVP8 support
Add the config for setting SPD DIMM size to 512 bytes
for KBLRVP8 with DDR4 memory. Configure the DIMM1 memory
SPD data for channel0 and channel1. Set the UserBd UPD to
BOARD_TYPE_DESKTOP for kblrvp8.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I985968d331991884050c3920ec9798cd4cb371c7
Reviewed-on: https://review.coreboot.org/25194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions