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| author | Aamir Bohra <aamir.bohra@intel.com> | 2017-04-26 19:30:41 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-09 17:55:28 +0200 |
| commit | 83f7baec308cffee0709e38c95e3b4726915e2ea (patch) | |
| tree | 9e9169e15d686e33d11600927f1a04298c3b3a59 /.gitignore | |
| parent | 502131a6ad3f3eae89ccd85402708ae90a6f2b4f (diff) | |
| download | coreboot-83f7baec308cffee0709e38c95e3b4726915e2ea.tar.xz | |
soc/intel/common: Add PCI configuration code for UART
Add PCI configuration code support for intel/common/
block/uart module.
Change-Id: Ibce5623ffb879f2427b759106d1f350601837e4b
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions