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authorMatt DeVillier <matt.devillier@gmail.com>2019-04-23 12:21:17 -0500
committerNico Huber <nico.h@gmx.de>2019-05-03 20:13:59 +0000
commitfd7440d23126a0133e2563849fceec55a772de80 (patch)
tree6f273a2c6cbcbe13f7ba5db7b1d8bbff3ffec290 /.gitignore
parent8c99a4859e7830fd1cac0b729fc29412cd773b75 (diff)
downloadcoreboot-fd7440d23126a0133e2563849fceec55a772de80.tar.xz
soc/intel/braswell: add default option to use public FSP
The current Braswell FSP 1.1 header in vendorcode/intel, for which there is no publicly available FSP binary, contains silicon init UPDs which are not found in the publicly available header/binary in the FSP Github repo. This prevents new boards from being added which use the public Braswell FSP header/binary. To resolve this, move the UPDs not found in the public header from the soc's chip.c to ramstage.c for the boards which use them. Add a Kconfig option to use the current non-public FSP header and select it for boards which need it (google/cyan variants); set the public FSP option as the default. Use the Kconfig option to set FSP_HEADER_PATH to ensure the correct header is used. Test: build google/cyan and intel/strago using non-public and public FSP header/binaries respectively. Change-Id: I43cf18b98c844175a87b61fdbe4b0b24484e5702 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
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