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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-07-18 00:30:30 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-26 21:32:50 +0000 |
| commit | 6489a19c780126a92931fc9b20a617cedbba7b6b (patch) | |
| tree | f4cf6fb53cd4e6829a63f9956d164759ef4b9477 /.gitmodules | |
| parent | 21f50a8fd43aebbfdbb861c51a8ad58a03218a46 (diff) | |
| download | coreboot-6489a19c780126a92931fc9b20a617cedbba7b6b.tar.xz | |
mb/asrock/h110m: undo set trig and bufdis for NF pads
According to the documentation [1], RX Level/Edge Configuration (trig)
and GPIO Tx/Rx Buffer Disable (bufdis) [2] settings are not applicable
in native mode and BIOS does not need to configure them. Therefore,
there is no need to configure this in gpio.h using PAD_CFG_NF_BUF_TRIG
macros. Use PAD_CFG_NF instead and set this fields to 0.
[1] Intel document #549921
[2] Intel document #336067-007US
This is part of the patch set
"src/mb/*, src/soc/intel/common/gpio: Remove PAD_CFG_NF_BUF_TRIG ":
CB:43455 - cedarisland: undo set trig and bufdis for NF pads
CB:43454 - tiogapass: undo set trig and bufdis for NF pads
CB:43561 - h110m: undo set trig and bufdis for NF pads
CB:43569 - soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG
Change-Id: I6a6b745bdaacb1c4fbf032e4ce54cb25a72d790a
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43561
Reviewed-by: Michael Niewöhner
Reviewed-by: Lance Zhao
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to '.gitmodules')
0 files changed, 0 insertions, 0 deletions