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authorSubrata Banik <subrata.banik@intel.com>2017-06-02 18:52:24 +0530
committerMartin Roth <martinroth@google.com>2017-06-09 17:06:26 +0200
commit46a71782678b17aec49e938ab941a2604a5b9afe (patch)
tree0914542b7227c0f8a729b3552fae25cc380cac58 /.gitmodules
parent7609c654b18b232bd0b45621ebd3921d14db8a39 (diff)
downloadcoreboot-46a71782678b17aec49e938ab941a2604a5b9afe.tar.xz
soc/intel/skylake: Use common systemagent code
This patch perform resource mapping for PCI, fixed MMIO, DRAM and IMR's based on inputs given by SoC. TEST=Ensure PCI root bridge 0:0:0 memory resource allocation remains same between previous implementation and current implementation. Change-Id: I93567a79b2d12dd5d6363957e55ce2cb86ff83a7 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/19796 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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