soc/intel/alderlake: Align RcompResistor definition as per MRC

List of changes:
1. Alder Lake MRC is expecting a RcompResistor value of word width.
Reference RCOMP resistors on motherboard are ~ 100 Ohms but coreboot
is passing an array of RcompResistor which is not completely in use.

Note: Rcomp resistor value represents rcomp resistor attached to
the DDR_COMP pins on the SoC.

2. Also, remove usage of '&' with memcpy the required value into
RcompTarget array.

3. Also, update RcompResistor value for ADLRVP.

BUG=b:183341229
TEST=Enable FSP debug log to verify the override value for
RcompResistor is reflecting correctly.

Change-Id: I69c7cec55b65036fc039c33374a3fd363ef7004e
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51704
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

0 files changed, 0 insertions, 0 deletions