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authorAaron Durbin <adurbin@chromium.org>2016-05-26 10:55:48 -0500
committerAaron Durbin <adurbin@chromium.org>2016-05-27 19:53:16 +0200
commit10221a0e570717760087163b075f7f535f882b61 (patch)
treee93c66d9ad1a4ffec1e3ef951c9cb51893743391 /3rdparty
parenta9ac2d9b914d849b207d3f6c73892240017bf932 (diff)
downloadcoreboot-10221a0e570717760087163b075f7f535f882b61.tar.xz
arch/x86: provide verstage support for CONFIG_C_ENVIRONMENT_BOOTBLOCK
When CONFIG_C_ENVIRONMENT_BOOTBLOCK is employed there's no need for a chipset specific verstage entry point because cache-as-ram has already been initialized. Therefore, provide a default entry point for verstage in that environment. Change-Id: Idd8f45bd58d3e5b251d1e38cca7ae794b8b77a28 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14971 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
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