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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-03-26 14:33:16 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-07-18 13:51:57 +0000 |
| commit | 2af2f2c8cad259ec9ea4d8b217e86a19db2c0d82 (patch) | |
| tree | 0be78e83c23acd09b02db8c3aa5eff11dd54e702 /3rdparty | |
| parent | 6752b61514609efd55e7d248b7c3c7127ee43693 (diff) | |
| download | coreboot-2af2f2c8cad259ec9ea4d8b217e86a19db2c0d82.tar.xz | |
nb/intel/sandybridge/acpi: Don't use defines for memory ranges
Read the northbridge BARs from device PCI0:0.0.
Untested.
Change-Id: I27bfb5721d9ae3dc5629942ebac29b12a7308441
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to '3rdparty')
0 files changed, 0 insertions, 0 deletions