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| author | Yu-Ping Wu <yupingso@google.com> | 2019-10-23 16:51:26 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-24 15:49:10 +0000 |
| commit | ea4bda55d62d90e008a5aa455f24adcd7759b37a (patch) | |
| tree | c79d6b182d378d273fded70da5f1485c270b82bc /3rdparty | |
| parent | 241f0a559347a9ee5325b94c0a021dd404da4030 (diff) | |
| download | coreboot-ea4bda55d62d90e008a5aa455f24adcd7759b37a.tar.xz | |
soc/mediatek/mt8183: Add udelay after setting voltages
The SOC DRAM team suggested to delay at least 1us after setting new
voltage in PMIC wrapper so the new value can be effective.
BRANCH=kukui
BUG=b:142358843
TEST=emerge-kukui coreboot
Change-Id: I19d236769c3c0c87513ea4a0a3f64b83e3a844c2
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36254
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to '3rdparty')
0 files changed, 0 insertions, 0 deletions