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authorStefan Reinauer <stepan@coresystems.de>2008-03-17 22:59:40 +0000
committerStefan Reinauer <stepan@openbios.org>2008-03-17 22:59:40 +0000
commit012ed48bf2c28af293c1868f8e0d0371e20ed8ec (patch)
tree0be4e162021cf0a87a5b7a2a489ee6ffada29bf6
parent2ce4e4caa9c2856c77b666299b9551dfd10a0dab (diff)
downloadcoreboot-012ed48bf2c28af293c1868f8e0d0371e20ed8ec.tar.xz
Support for the Winbond W39V080FA series of chips.
Support for flashing on the Kontron 986LCD-M board. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--util/flashrom/Makefile2
-rw-r--r--util/flashrom/board_enable.c38
-rw-r--r--util/flashrom/flash.h7
-rw-r--r--util/flashrom/flashchips.c2
-rw-r--r--util/flashrom/flashrom.c4
5 files changed, 50 insertions, 3 deletions
diff --git a/util/flashrom/Makefile b/util/flashrom/Makefile
index 57c96867d2..2258360a2b 100644
--- a/util/flashrom/Makefile
+++ b/util/flashrom/Makefile
@@ -24,7 +24,7 @@ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o sst28sf040.o \
am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o w49f002u.o \
82802ab.o msys_doc.o pm49fl004.o sst49lf040.o sst49lfxxxc.o \
sst_fwhub.o layout.o cbtable.o flashchips.o flashrom.o \
- sharplhf00l04.o w29ee011.o spi.o
+ w39v080fa.o sharplhf00l04.o w29ee011.o spi.o
all: pciutils dep $(PROGRAM)
diff --git a/util/flashrom/board_enable.c b/util/flashrom/board_enable.c
index 714e650220..9691748714 100644
--- a/util/flashrom/board_enable.c
+++ b/util/flashrom/board_enable.c
@@ -431,6 +431,42 @@ static int board_artecgroup_dbe6x(const char *name)
return 0;
}
+static int board_kontron_986lcd_m(const char *name)
+{
+ struct pci_dev *dev;
+ uint16_t gpiobar;
+ uint32_t val;
+
+#define ICH7_GPIO_LVL2 0x38
+
+ dev = pci_dev_find(0x8086, 0x27b8); /* Intel ICH7 LPC */
+ if (!dev) {
+ // This will never happen on this board
+ fprintf(stderr, "\nERROR: ICH7 LPC bridge not found.\n");
+ return -1;
+ }
+
+ /* Use GPIOBASE register to find where the GPIO is mapped. */
+ gpiobar = pci_read_word(dev, 0x48) & 0xfffc;
+
+ val = inl(gpiobar + ICH7_GPIO_LVL2); /* GP_LVL2 */
+ printf_debug("\nGPIOBAR=0x%04x GP_LVL: 0x%08x\n", gpiobar, val);
+
+ /* bit 2 (0x04) = 0 #TBL --> bootblock locking = 1
+ * bit 2 (0x04) = 1 #TBL --> bootblock locking = 0
+ * bit 3 (0x08) = 0 #WP --> block locking = 1
+ * bit 3 (0x08) = 1 #WP --> block locking = 0
+ *
+ * To enable full block locking, you would do:
+ * val &= ~ ((1 << 2) | (1 << 3));
+ */
+ val |= (1 << 2) | (1 << 3);
+
+ outl(val, gpiobar + ICH7_GPIO_LVL2);
+
+ return 0;
+}
+
/**
* We use 2 sets of IDs here, you're free to choose which is which. This
* is to provide a very high degree of certainty when matching a board on
@@ -497,6 +533,8 @@ struct board_pciid_enable board_pciid_enables[] = {
"artecgroup", "dbe61", "Artec Group DBE61", board_artecgroup_dbe6x},
{0x1022, 0x2090, 0x0000, 0x0000, 0x1022, 0x2080, 0x0000, 0x0000,
"artecgroup", "dbe62", "Artec Group DBE62", board_artecgroup_dbe6x},
+ {0x8086, 0x27b8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ "kontron", "986lcd-m", "Kontron 986LCD-M", board_kontron_986lcd_m},
{0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL} /* Keep this */
};
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index 5b800ce5ec..930bf6dba9 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -276,6 +276,8 @@ extern struct flashchip flashchips[];
#define W_39V040A 0x3D
#define W_39V040B 0x54
#define W_39V080A 0xD0
+#define W_39V080FA 0xD3
+#define W_39V080FA_DM 0x93
#define W_49F002U 0x0B
#define W_49V002A 0xB0
#define W_49V002FA 0x32
@@ -414,6 +416,11 @@ int probe_sst_fwhub(struct flashchip *flash);
int erase_sst_fwhub(struct flashchip *flash);
int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
+/* w39V080fa.c */
+int probe_winbond_fwhub(struct flashchip *flash);
+int erase_winbond_fwhub(struct flashchip *flash);
+int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
+
/* w29ee011.c */
int probe_w29ee011(struct flashchip *flash);
diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c
index e33813f04c..4b9d4c2cb0 100644
--- a/util/flashrom/flashchips.c
+++ b/util/flashrom/flashchips.c
@@ -129,6 +129,8 @@ struct flashchip flashchips[] = {
{"Winbond", "W49F002U", WINBOND_ID, W_49F002U, 256, 128, probe_jedec, erase_chip_jedec, write_49f002},
{"Winbond", "W49V002A", WINBOND_ID, W_49V002A, 256, 128, probe_jedec, erase_chip_jedec, write_49f002},
{"Winbond", "W49V002FA", WINBOND_ID, W_49V002FA, 256, 128, probe_jedec, erase_chip_jedec, write_49f002},
+ {"Winbond", "W39V080FA", WINBOND_ID, W_39V080FA, 1024, 64*1024, probe_winbond_fwhub, erase_winbond_fwhub, write_winbond_fwhub},
+ {"Winbond", "W39V080FA (dual mode)",WINBOND_ID, W_39V080FA_DM, 512, 64*1024, probe_winbond_fwhub, erase_winbond_fwhub, write_winbond_fwhub},
{"EON", "unknown SPI chip", EON_ID_NOPREFIX,GENERIC_DEVICE_ID, 0, 0, probe_spi, NULL, NULL},
{"Macronix", "unknown SPI chip", MX_ID, GENERIC_DEVICE_ID, 0, 0, probe_spi, NULL, NULL},
diff --git a/util/flashrom/flashrom.c b/util/flashrom/flashrom.c
index 4130d76c3f..29c3a58798 100644
--- a/util/flashrom/flashrom.c
+++ b/util/flashrom/flashrom.c
@@ -109,8 +109,8 @@ struct flashchip *probe_flash(struct flashchip *flash)
flash++;
continue;
}
- printf_debug("Probing for %s, %d KB\n",
- flash->name, flash->total_size);
+ printf_debug("Probing for %s %s, %d KB: ",
+ flash->vendor, flash->name, flash->total_size);
size = flash->total_size * 1024;