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authorJosie Nordrum <JosieNordrum@google.com>2020-10-22 17:52:37 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-10-28 17:18:00 +0000
commit0310fe7bdc71d6a3a96ad8438b6089b77e838c70 (patch)
tree4cfd3c7077bec9cce0ba62f8bf52b63489da8af6
parentda4d9da51a14081172762ff42e406bd5c810a7ed (diff)
downloadcoreboot-0310fe7bdc71d6a3a96ad8438b6089b77e838c70.tar.xz
mb/google/zork: Generate acpi methods in mainboard.c
Generate acpi methods which enable and disable backlight during _INI, _WAK, and _PTS. BUG=b:158087989 BRANCH=Zork TEST=check backlight during reboot and suspend Signed-off-by: Josie Nordrum <JosieNordrum@google.com> Change-Id: I2f3434dc92de1f697693ff69ca15bd76647b89a2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46671 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/zork/mainboard.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c
index f0d9a2869d..9503d3762c 100644
--- a/src/mainboard/google/zork/mainboard.c
+++ b/src/mainboard/google/zork/mainboard.c
@@ -6,6 +6,7 @@
#include <device/device.h>
#include <device/mmio.h>
#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <acpi/acpi_gnvs.h>
#include <amdblocks/amd_pci_util.h>
#include <amdblocks/gpio_banks.h>
@@ -28,6 +29,12 @@
#include <commonlib/helpers.h>
#include <bootstate.h>
+#define METHOD_BACKLIGHT_ENABLE "\\_SB.BKEN"
+#define METHOD_BACKLIGHT_DISABLE "\\_SB.BKDS"
+#define METHOD_MAINBOARD_INI "\\_SB.MINI"
+#define METHOD_MAINBOARD_WAK "\\_SB.MWAK"
+#define METHOD_MAINBOARD_PTS "\\_SB.MPTS"
+
/***********************************************************
* These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
* This table is responsible for physically routing the PIC and
@@ -175,6 +182,50 @@ void mainboard_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs,
variant_get_dxio_ddi_descriptors(dxio_descs, dxio_num, ddi_descs, ddi_num);
}
+static void mainboard_write_blken(void)
+{
+ acpigen_write_method(METHOD_BACKLIGHT_ENABLE, 0);
+ acpigen_soc_clear_tx_gpio(GPIO_85);
+ acpigen_pop_len();
+}
+
+static void mainboard_write_blkdis(void)
+{
+ acpigen_write_method(METHOD_BACKLIGHT_DISABLE, 0);
+ acpigen_soc_set_tx_gpio(GPIO_85);
+ acpigen_pop_len();
+}
+
+static void mainboard_write_mini(void)
+{
+ acpigen_write_method(METHOD_MAINBOARD_INI, 0);
+ acpigen_emit_namestring(METHOD_BACKLIGHT_ENABLE);
+ acpigen_pop_len();
+}
+
+static void mainboard_write_mwak(void)
+{
+ acpigen_write_method(METHOD_MAINBOARD_WAK, 0);
+ acpigen_emit_namestring(METHOD_BACKLIGHT_ENABLE);
+ acpigen_pop_len();
+}
+
+static void mainboard_write_mpts(void)
+{
+ acpigen_write_method(METHOD_MAINBOARD_PTS, 0);
+ acpigen_emit_namestring(METHOD_BACKLIGHT_DISABLE);
+ acpigen_pop_len();
+}
+
+static void mainboard_fill_ssdt(const struct device *dev)
+{
+ mainboard_write_blken();
+ mainboard_write_blkdis();
+ mainboard_write_mini();
+ mainboard_write_mpts();
+ mainboard_write_mwak();
+}
+
/*************************************************
* Dedicated mainboard function
*************************************************/
@@ -186,6 +237,8 @@ static void zork_enable(struct device *dev)
pirq_setup();
dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator;
+ dev->ops->acpi_fill_ssdt = mainboard_fill_ssdt;
+
}
static void mainboard_final(void *chip_info)