summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPatrick Rudolph <patrick.rudolph@9elements.com>2020-09-24 20:32:53 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-28 09:36:00 +0000
commit0348bbe9715710eca2ac93b535128cd0a5238d30 (patch)
treebe47640fe178efd7f1055744eeac5f24be87393f
parent597922ecb4ab02467ab07ce86b0258da6b67ee99 (diff)
downloadcoreboot-0348bbe9715710eca2ac93b535128cd0a5238d30.tar.xz
include/cpu/x86/tsc: Fix rdtsc on x86_64
The used assembler code only works on x86_32, but not on x86_64. Use the inline functions to provide valid rdtsc readings on both x86_32 and x86_64. Tested on Lenovo T410 with additional x86_64 patches. Change-Id: Icf706d6fb751372651e5e56d1856ddad688d9fa3 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
-rw-r--r--src/include/cpu/x86/tsc.h14
1 files changed, 4 insertions, 10 deletions
diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h
index 6943b93018..ddce96bb39 100644
--- a/src/include/cpu/x86/tsc.h
+++ b/src/include/cpu/x86/tsc.h
@@ -41,20 +41,14 @@ static inline void multiply_to_tsc(tsc_t *const tsc, const u32 a, const u32 b)
tsc->hi = ((a >> 16) * (b >> 16)) + (tsc->hi >> 16);
}
-static inline unsigned long long rdtscll(void)
+static inline uint64_t tsc_to_uint64(tsc_t tstamp)
{
- unsigned long long val;
- asm volatile (
- TSC_SYNC
- "rdtsc"
- : "=A" (val)
- );
- return val;
+ return (((uint64_t)tstamp.hi) << 32) + tstamp.lo;
}
-static inline uint64_t tsc_to_uint64(tsc_t tstamp)
+static inline unsigned long long rdtscll(void)
{
- return (((uint64_t)tstamp.hi) << 32) + tstamp.lo;
+ return tsc_to_uint64(rdtsc());
}
/* Provided by CPU/chipset code for the TSC rate in MHz. */