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authorhuang lin <hl@rock-chips.com>2015-01-29 19:50:59 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-17 09:57:28 +0200
commit0c253b69af0f020703634d56b7140056f6400ec3 (patch)
tree2cc8b661495500def211ff15b28604e74e08fc3c
parent710e0a2726b43070133f4c2affb986c7aef6c26e (diff)
downloadcoreboot-0c253b69af0f020703634d56b7140056f6400ec3.tar.xz
rk3288: move reboot_from_watchdog() before rk808 setting
we will use dvs to adjust the voltage in kernel, if device reset by watchdog in kernel, the dvs gpio may not reset, and we use the i2c to adjust rk808 voltage in coreboot, so it may failure. so we move the reboot_from_watchdog() before the rk808 setting. BUG=None TEST=Boot from speedy BRANCH=None Change-Id: I809c63153d49680d9c84462aafd7bae09106fa6e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 76efb4b0196eecc84664a4c5dce2221152a39c0a Original-Change-Id: I92b5c6413bbffe30566178de89df1f9683790982 Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/244289 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Julius Werner <jwerner@chromium.org> Original-Tested-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9752 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/mainboard/google/veyron_jerry/bootblock.c6
-rw-r--r--src/mainboard/google/veyron_mighty/bootblock.c6
-rw-r--r--src/mainboard/google/veyron_pinky/bootblock.c6
-rw-r--r--src/mainboard/google/veyron_speedy/bootblock.c6
4 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/google/veyron_jerry/bootblock.c b/src/mainboard/google/veyron_jerry/bootblock.c
index acf81bc0cb..2f012ec80e 100644
--- a/src/mainboard/google/veyron_jerry/bootblock.c
+++ b/src/mainboard/google/veyron_jerry/bootblock.c
@@ -45,6 +45,9 @@ void bootblock_mainboard_early_init()
void bootblock_mainboard_init(void)
{
+ if (rkclk_was_watchdog_reset())
+ reboot_from_watchdog();
+
/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
@@ -58,9 +61,6 @@ void bootblock_mainboard_init(void)
udelay(100);/* Must wait for voltage to stabilize,2mV/us */
rkclk_configure_cpu();
- if (rkclk_was_watchdog_reset())
- reboot_from_watchdog();
-
/* i2c1 for tpm */
writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
i2c_init(1, 400*KHz);
diff --git a/src/mainboard/google/veyron_mighty/bootblock.c b/src/mainboard/google/veyron_mighty/bootblock.c
index acf81bc0cb..2f012ec80e 100644
--- a/src/mainboard/google/veyron_mighty/bootblock.c
+++ b/src/mainboard/google/veyron_mighty/bootblock.c
@@ -45,6 +45,9 @@ void bootblock_mainboard_early_init()
void bootblock_mainboard_init(void)
{
+ if (rkclk_was_watchdog_reset())
+ reboot_from_watchdog();
+
/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
@@ -58,9 +61,6 @@ void bootblock_mainboard_init(void)
udelay(100);/* Must wait for voltage to stabilize,2mV/us */
rkclk_configure_cpu();
- if (rkclk_was_watchdog_reset())
- reboot_from_watchdog();
-
/* i2c1 for tpm */
writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
i2c_init(1, 400*KHz);
diff --git a/src/mainboard/google/veyron_pinky/bootblock.c b/src/mainboard/google/veyron_pinky/bootblock.c
index acf81bc0cb..2f012ec80e 100644
--- a/src/mainboard/google/veyron_pinky/bootblock.c
+++ b/src/mainboard/google/veyron_pinky/bootblock.c
@@ -45,6 +45,9 @@ void bootblock_mainboard_early_init()
void bootblock_mainboard_init(void)
{
+ if (rkclk_was_watchdog_reset())
+ reboot_from_watchdog();
+
/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
@@ -58,9 +61,6 @@ void bootblock_mainboard_init(void)
udelay(100);/* Must wait for voltage to stabilize,2mV/us */
rkclk_configure_cpu();
- if (rkclk_was_watchdog_reset())
- reboot_from_watchdog();
-
/* i2c1 for tpm */
writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
i2c_init(1, 400*KHz);
diff --git a/src/mainboard/google/veyron_speedy/bootblock.c b/src/mainboard/google/veyron_speedy/bootblock.c
index acf81bc0cb..2f012ec80e 100644
--- a/src/mainboard/google/veyron_speedy/bootblock.c
+++ b/src/mainboard/google/veyron_speedy/bootblock.c
@@ -45,6 +45,9 @@ void bootblock_mainboard_early_init()
void bootblock_mainboard_init(void)
{
+ if (rkclk_was_watchdog_reset())
+ reboot_from_watchdog();
+
/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
@@ -58,9 +61,6 @@ void bootblock_mainboard_init(void)
udelay(100);/* Must wait for voltage to stabilize,2mV/us */
rkclk_configure_cpu();
- if (rkclk_was_watchdog_reset())
- reboot_from_watchdog();
-
/* i2c1 for tpm */
writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
i2c_init(1, 400*KHz);