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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-10-30 10:50:47 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-05 09:16:07 +0000
commit0f14df46aa8717097b032c24f8410e0520f5a755 (patch)
tree9fe4836cc8f364c81f9180f64f3414bec2814212
parent40a196640070d423973e2a5a2279c92983a94780 (diff)
downloadcoreboot-0f14df46aa8717097b032c24f8410e0520f5a755.tar.xz
nb/intel/x4x/raminit: Add missing space
TEST=Make the printk reachable, check with `strings build/cbfs/fallback/romstage.elf | grep lowest` that this patch changes "MHzas" to "MHz as". Change-Id: I42033d2f184e424818edf844cf6cf84ea07d7ed5 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/29346 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/northbridge/intel/x4x/raminit.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 80bde6c06c..ff1f970e2e 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -304,7 +304,7 @@ static void select_cas_dramfreq_ddr3(struct sysinfo *s,
min_tCLK = MAX(min_tCLK, saved_timings->min_tclk);
if (min_tCLK == 0) {
printk(BIOS_ERR, "DRAM frequency is under lowest supported "
- "frequency (400 MHz). Increasing to 400 MHz"
+ "frequency (400 MHz). Increasing to 400 MHz "
"as last resort");
min_tCLK = TCK_400MHZ;
}