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authorKevin Chiu <Kevin.Chiu@quantatw.com>2018-08-16 22:49:49 +0800
committerMartin Roth <martinroth@google.com>2018-08-17 21:10:34 +0000
commit108bf2951648a6953fa96d79fd591868c43da147 (patch)
treecd66ca0a1b692808c84c2ed7cc164cb0dc18fd43
parent24462e65076372dd15cc6587a04fc2c49a9afe5a (diff)
downloadcoreboot-108bf2951648a6953fa96d79fd591868c43da147.tar.xz
google/grunt: Update TP/TS/H1 i2c timings
After adjustment on Careena EVT TP: 400.0 KHz TS: 396.8 KHz H1: 396.8 KHz BUG=b:112663934,b:112664258 BRANCH=master TEST=emerge-grunt coreboot measure by scope Change-Id: I9eeaf9290d95969a283f14618878e28faf0ea46f Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/28119 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/kahlee/variants/careena/devicetree.cb10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb
index 61476a2322..513bd4efee 100644
--- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb
+++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb
@@ -32,22 +32,22 @@ chip soc/amd/stoneyridge
register "i2c[1]" = "{
.early_init = 1,
.speed = I2C_SPEED_FAST,
- .rise_time_ns = 84,
+ .rise_time_ns = 45,
.fall_time_ns = 4,
}"
# Enable I2C2 for trackpad, pen at 400kHz
register "i2c[2]" = "{
.speed = I2C_SPEED_FAST,
- .rise_time_ns = 117,
- .fall_time_ns = 113,
+ .rise_time_ns = 67,
+ .fall_time_ns = 55,
}"
# Enable I2C3 for touchscreen at 400kHz
register "i2c[3]" = "{
.speed = I2C_SPEED_FAST,
- .rise_time_ns = 82,
- .fall_time_ns = 67,
+ .rise_time_ns = 22,
+ .fall_time_ns = 19,
}"
device cpu_cluster 0 on