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authorDuncan Laurie <dlaurie@chromium.org>2013-11-04 17:02:45 -0800
committerAaron Durbin <adurbin@google.com>2014-04-30 23:11:21 +0200
commit1f52f51f4e6dd2c97faa46e3287460d8b2ad335b (patch)
treee45fd6e6fe39da8fd3e36bce9f14bf07a2b41c0e
parent7fbe20bd2c3b8e0bcb667f5b1a07b80402fa8504 (diff)
downloadcoreboot-1f52f51f4e6dd2c97faa46e3287460d8b2ad335b.tar.xz
baytrail: Add function to read top of low memory
The top of low memory is also the start of the region where PCIe resources are allocated. This needs to be passed in ACPI but is only readable from IOSF. BUG=chrome-os-partner:23505 BRANCH=rambi TEST=build and boot on rambi Change-Id: Iad95335f72dc3e35b837bedb8d52d388c861a330 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175625 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4935 Tested-by: build bot (Jenkins)
-rw-r--r--src/soc/intel/baytrail/baytrail/iomap.h5
-rw-r--r--src/soc/intel/baytrail/northcluster.c8
2 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/baytrail/iomap.h b/src/soc/intel/baytrail/baytrail/iomap.h
index 77a55f5c05..d231dee5ec 100644
--- a/src/soc/intel/baytrail/baytrail/iomap.h
+++ b/src/soc/intel/baytrail/baytrail/iomap.h
@@ -79,4 +79,9 @@
#define SMBUS_BASE_ADDRESS 0xefa0
+#ifndef __ACPI__
+/* Read Top of Low Memory (BMBOUND) */
+uint32_t nc_read_top_of_low_memory(void);
+#endif
+
#endif /* _BAYTRAIL_IOMAP_H_ */
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index eca122c056..e259163616 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -23,6 +23,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <baytrail/iomap.h>
#include <baytrail/iosf.h>
#include <baytrail/pci_devs.h>
#include <baytrail/ramstage.h>
@@ -64,6 +65,11 @@
*/
#define RES_IN_KiB(r) ((r) >> 10)
+uint32_t nc_read_top_of_low_memory(void)
+{
+ return iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1);
+}
+
static void nc_read_resources(device_t dev)
{
unsigned long mmconf;
@@ -107,7 +113,7 @@ static void nc_read_resources(device_t dev)
reserved_ram_resource(dev, index++, smmrrl, smmrrh - smmrrl);
/* All address space between bmbound and smmrrh is unusable. */
- bmbound = RES_IN_KiB(iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1));
+ bmbound = RES_IN_KiB(nc_read_top_of_low_memory());
mmio_resource(dev, index++, smmrrh, bmbound - smmrrh);
/* The BMBOUND_HI register matches register bits of 31:24 with address