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authorDuncan Laurie <dlaurie@chromium.org>2013-07-30 15:41:42 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 07:39:33 +0100
commit289bac6a04f5cb16a9297c31e7a11013b0b51eb4 (patch)
tree8b29276ff01de49454f972fa4066f2ea595ed5fa
parentd3c5e50506337a36039fcc42f71de50aadd6f076 (diff)
downloadcoreboot-289bac6a04f5cb16a9297c31e7a11013b0b51eb4.tar.xz
haswell: Add pei_data field for USB routing
The linux kernel will unconditionally route all USB ports to the XCHI controller at boot. The EHCI controller can then be disabled, and it should be left disabled by the reference code when this is done. However not all OS may do this unconditional route, so provide an option to the reference code binary to enable this behavior. Change-Id: Iedf5af54182bf109cd1119c1999e46300665d41e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63797 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4403 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
-rw-r--r--src/northbridge/intel/haswell/pei_data.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h
index b7dc8cf57a..f9d6e8b16a 100644
--- a/src/northbridge/intel/haswell/pei_data.h
+++ b/src/northbridge/intel/haswell/pei_data.h
@@ -31,7 +31,7 @@
#define PEI_DATA_H
typedef void (*tx_byte_func)(unsigned char byte);
-#define PEI_VERSION 13
+#define PEI_VERSION 14
#define MAX_USB2_PORTS 16
#define MAX_USB3_PORTS 16
@@ -103,6 +103,8 @@ struct pei_data
* 1067, 1333, 1600
*/
uint32_t max_ddr3_freq;
+ /* Route all USB ports to XHCI controller in resume path */
+ int usb_xhci_on_resume;
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];
struct usb3_port_setting usb3_ports[MAX_USB3_PORTS];
uint8_t spd_data[4][256];