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authorMatt DeVillier <matt.devillier@gmail.com>2020-03-30 21:55:21 -0500
committerMatt DeVillier <matt.devillier@gmail.com>2020-04-02 20:31:34 +0000
commit28f727b59ba10eec3b3805cc57542643856fbef2 (patch)
tree3b33ed655142f86f5458af5f25ed64a33dcac84a
parentc821f00b518c82d20672be844c3a3ef4807112fe (diff)
downloadcoreboot-28f727b59ba10eec3b3805cc57542643856fbef2.tar.xz
sb/intel/i82801gx: drop IGD-related NVS variables
NDID/DID entries are no longer used by the GMA SSDT generator, so drop them. SSDT generation will be simplified in a subsequent commit. Change-Id: I51a11e7ed6686ab67dac3f02097457ea9c6a7e6a Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/southbridge/intel/i82801gx/acpi/globalnvs.asl7
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c8
-rw-r--r--src/southbridge/intel/i82801gx/nvs.h5
3 files changed, 1 insertions, 19 deletions
diff --git a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
index 4a19de1476..28e79e9f33 100644
--- a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
+++ b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
@@ -87,13 +87,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
TLST, 8, // 0x3d - Display Toggle List pointer
CADL, 8, // 0x3e - Currently Attached Devices List
PADL, 8, // 0x3f - Previously Attached Devices List
- Offset (0x46),
- NDID, 8, // 0x46 - Number of Device IDs
- DID1, 32, // 0x47 - Device ID 1
- DID2, 32, // 0x4b - Device ID 2
- DID3, 32, // 0x4f - Device ID 3
- DID4, 32, // 0x53 - Device ID 4
- DID5, 32, // 0x57 - Device ID 5
/* Backlight Control */
Offset (0x64),
BLCS, 8, // 0x64 - Backlight control possible?
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index db0dc4198a..ce5d82f3ed 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -30,7 +30,6 @@
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <string.h>
-#include <drivers/intel/gma/i915.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <southbridge/intel/common/pmbase.h>
#include <southbridge/intel/common/spi.h>
@@ -642,8 +641,6 @@ static void southbridge_inject_dsdt(struct device *dev)
global_nvs_t *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
if (gnvs) {
- const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
-
memset(gnvs, 0, sizeof(*gnvs));
gnvs->apic = 1;
@@ -651,11 +648,6 @@ static void southbridge_inject_dsdt(struct device *dev)
acpi_create_gnvs(gnvs);
- if (gfx) {
- gnvs->ndid = gfx->ndid;
- memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
- }
-
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL);
diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h
index 6a178d2f3a..0b12d95f00 100644
--- a/src/southbridge/intel/i82801gx/nvs.h
+++ b/src/southbridge/intel/i82801gx/nvs.h
@@ -71,10 +71,7 @@ typedef struct {
u8 tlst; /* 0x3d - Display Toggle List Pointer */
u8 cadl; /* 0x3e - currently attached devices */
u8 padl; /* 0x3f - previously attached devices */
- u16 rsvd14[3];
- u8 ndid; /* 0x46 - number of device ids */
- u32 did[5]; /* 0x47 - 5b device id 1..5 */
- u8 rsvd5[0x9];
+ u8 rsvd5[36];
/* Backlight Control */
u8 blcs; /* 0x64 - Backlight Control possible */
u8 brtl;