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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-23 16:44:55 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-02-11 20:44:37 +0000 |
commit | 2d8aff3d9348bc500dd7382f173b7d9b028ff44d (patch) | |
tree | 788576f9762e4fba0822d0e74995a6eada33e923 | |
parent | 8fd78a653f812b6bf8daf4cf3191f3d32ab1d5a8 (diff) | |
download | coreboot-2d8aff3d9348bc500dd7382f173b7d9b028ff44d.tar.xz |
device/pci_ops: Apply some symmetry in headers
To make PCI driver side arch-agnostic, function
declarations have to be in symmetrical header
file locations.
From the driver side, the correct file to include
is now <device/pci_ops.h>
Change-Id: I8076a4867fd7472beaae0a021dcf0d9c7c905871
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31306
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r-- | src/arch/x86/include/arch/io.h | 61 | ||||
-rw-r--r-- | src/arch/x86/include/arch/pci_io_cfg.h | 42 | ||||
-rw-r--r-- | src/arch/x86/include/arch/pci_ops.h | 3 | ||||
-rw-r--r-- | src/device/pci_early.c | 1 | ||||
-rw-r--r-- | src/include/device/pci_mmio_cfg.h | 42 |
5 files changed, 91 insertions, 58 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index a2ba776f81..20338e065b 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -203,67 +203,14 @@ static __always_inline void write64(volatile void *addr, } #endif +/* FIXME: We should avoid this indirect include. Also this has to + * appear here after all MMIO and IO read/write functions. */ +#include <arch/pci_ops.h> + #ifdef __SIMPLE_DEVICE__ #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC)) -#include <arch/pci_io_cfg.h> -#include <device/pci_mmio_cfg.h> - -static __always_inline -uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - return pci_mmio_read_config8(dev, where); - else - return pci_io_read_config8(dev, where); -} - -static __always_inline -uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - return pci_mmio_read_config16(dev, where); - else - return pci_io_read_config16(dev, where); -} - -static __always_inline -uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - return pci_mmio_read_config32(dev, where); - else - return pci_io_read_config32(dev, where); -} - -static __always_inline -void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - pci_mmio_write_config8(dev, where, value); - else - pci_io_write_config8(dev, where, value); -} - -static __always_inline -void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - pci_mmio_write_config16(dev, where, value); - else - pci_io_write_config16(dev, where, value); -} - -static __always_inline -void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - pci_mmio_write_config32(dev, where, value); - else - pci_io_write_config32(dev, where, value); -} - /* Generic functions for pnp devices */ static __always_inline void pnp_write_config( pnp_devfn_t dev, uint8_t reg, uint8_t value) diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h index ddc62ed393..d02e6404d2 100644 --- a/src/arch/x86/include/arch/pci_io_cfg.h +++ b/src/arch/x86/include/arch/pci_io_cfg.h @@ -14,7 +14,9 @@ #ifndef _PCI_IO_CFG_H #define _PCI_IO_CFG_H +#include <stdint.h> #include <arch/io.h> +#include <device/pci_type.h> static __always_inline unsigned int pci_io_encode_addr(pci_devfn_t dev, unsigned int where) @@ -75,4 +77,44 @@ void pci_io_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) outl(value, 0xCFC); } +#if !IS_ENABLED(CONFIG_MMCONF_SUPPORT) +#ifdef __SIMPLE_DEVICE__ +static __always_inline +uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) +{ + return pci_io_read_config8(dev, where); +} + +static __always_inline +uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where) +{ + return pci_io_read_config16(dev, where); +} + +static __always_inline +uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where) +{ + return pci_io_read_config32(dev, where); +} + +static __always_inline +void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) +{ + pci_io_write_config8(dev, where, value); +} + +static __always_inline +void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) +{ + pci_io_write_config16(dev, where, value); +} + +static __always_inline +void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) +{ + pci_io_write_config32(dev, where, value); +} +#endif /* __SIMPLE_DEVICE__ */ +#endif + #endif /* _PCI_IO_CFG_H */ diff --git a/src/arch/x86/include/arch/pci_ops.h b/src/arch/x86/include/arch/pci_ops.h index 3f1515e8f0..67633f43e9 100644 --- a/src/arch/x86/include/arch/pci_ops.h +++ b/src/arch/x86/include/arch/pci_ops.h @@ -14,6 +14,9 @@ #ifndef ARCH_I386_PCI_OPS_H #define ARCH_I386_PCI_OPS_H +#include <arch/pci_io_cfg.h> +#include <device/pci_mmio_cfg.h> + #ifndef __SIMPLE_DEVICE__ extern const struct pci_bus_operations pci_cf8_conf1; diff --git a/src/device/pci_early.c b/src/device/pci_early.c index ea2ebd5033..5a1fb22681 100644 --- a/src/device/pci_early.c +++ b/src/device/pci_early.c @@ -15,7 +15,6 @@ #define __SIMPLE_DEVICE__ -#include <arch/io.h> #include <device/pci.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h index 2e2c19af48..0545001102 100644 --- a/src/include/device/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -70,4 +70,46 @@ void pci_mmio_write_config32(pci_devfn_t dev, unsigned int where, u32 value) write32(addr, value); } +#if IS_ENABLED(CONFIG_MMCONF_SUPPORT) + +#ifdef __SIMPLE_DEVICE__ +static __always_inline +uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) +{ + return pci_mmio_read_config8(dev, where); +} + +static __always_inline +uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where) +{ + return pci_mmio_read_config16(dev, where); +} + +static __always_inline +uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where) +{ + return pci_mmio_read_config32(dev, where); +} + +static __always_inline +void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) +{ + pci_mmio_write_config8(dev, where, value); +} + +static __always_inline +void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) +{ + pci_mmio_write_config16(dev, where, value); +} + +static __always_inline +void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) +{ + pci_mmio_write_config32(dev, where, value); +} +#endif /* __SIMPLE_DEVICE__ */ + +#endif + #endif /* _PCI_MMIO_CFG_H */ |