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authorMartin Roth <martinroth@google.com>2016-10-07 10:48:31 -0600
committerMartin Roth <martinroth@google.com>2016-10-07 18:59:07 +0200
commit2e6aeba9ca442f5db23a3eef73f7eead82f596e9 (patch)
tree9180af4cdab34ff3321b175a34dd0169d7746236
parent1a9035988addfbe89ed708fe3c91bf6cc54befdb (diff)
downloadcoreboot-2e6aeba9ca442f5db23a3eef73f7eead82f596e9.tar.xz
google/reef/variants/pyro: Add support for GPIO output polarity
commit 028200f7 - x86/acpi_device: Add support for GPIO output polarity updated ACPI_GPIO_OUTPUT to ACPI_GPIO_OUTPUT_ACTIVE_HIGH for the other boards that needed it, but pyro wasn't in the tree when it was initially pushed. Now that pyro is in the tree, it needs to be updated as well. Change-Id: I617999b06ee584e0543d7ae3232bb2be2ff7429c Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16930 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
-rw-r--r--src/mainboard/google/reef/variants/pyro/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb
index 087f85845e..43ec2ed054 100644
--- a/src/mainboard/google/reef/variants/pyro/devicetree.cb
+++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb
@@ -84,7 +84,7 @@ chip soc/intel/apollolake
device pci 0d.3 on end # - Shared SRAM
device pci 0e.0 on # - Audio
chip drivers/generic/max98357a
- register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPIO_76)"
+ register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
device generic 0 on end
end
end