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authorDavid Hendricks <dhendrix@chromium.org>2012-12-17 20:41:32 -0800
committerRonald G. Minnich <rminnich@gmail.com>2012-12-29 15:25:05 +0100
commit37a85163700f7183c786bab1004ff47cc90e9d9e (patch)
tree952132a21b73d621bd620d86d76ed8eceb5bf600
parent32675175efe5ae2101bcdf23e862c51f8f3306d1 (diff)
downloadcoreboot-37a85163700f7183c786bab1004ff47cc90e9d9e.tar.xz
Simplify romstage.ld for armv7
This is still a work-in-progress, but it seems to work better than before and is less complicated... Change-Id: I6f730d017391f9ec4401cdfd34931c869df10a9e Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2041 Tested-by: build bot (Jenkins)
-rw-r--r--src/arch/armv7/romstage.ld62
1 files changed, 12 insertions, 50 deletions
diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld
index 0a2f7f2947..d2b69d7183 100644
--- a/src/arch/armv7/romstage.ld
+++ b/src/arch/armv7/romstage.ld
@@ -29,7 +29,7 @@
* FIXME 2: Somehow linker didn't like CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE...
*/
/* MEMORY { .sram : ORIGIN = 0x02023400, LENGTH = 0x3800 } */
-MEMORY { .sram : ORIGIN = 0x02023400, LENGTH = 0x10000 }
+/*MEMORY { .sram : ORIGIN = 0x02023400, LENGTH = 0x10000 }*/
/* We use ELF as output format. So that we can debug the code in some form. */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
@@ -39,58 +39,20 @@ ENTRY(_start)
SECTIONS
{
- . = ROMSTAGE_BASE;
+ /* FIXME: replace this with CPU-specific Kconfig variable */
+ . = 0x02023400; /* Exynos5 */
- /*
- .rom . : {
+ .romtext . : {
_rom = .;
- *(.rom.text);
- *(.rom.data);
+ *(.text);
+ }
+
+ .romdata . : {
*(.rodata);
- *(.rodata.*);
- *(.rom.data.*);
- . = ALIGN(16);
+ *(.machine_param);
+ . = ALIGN(8);
_erom = .;
}
- */
-
- /* First we place the code and read only data (typically const declared).
- * This could theoretically be placed in rom.
- */
- .text : {
- _text = .;
- *(.text);
- *(.text.*);
- . = ALIGN(4);
- _etext = .;
- } >.sram
-
- .rodata : {
- _rodata = .;
- . = ALIGN(4);
- cpu_drivers = . ;
- *(.rodata.cpu_driver)
- ecpu_drivers = . ;
- *(.rodata)
- *(.rodata.*)
- /* kevinh/Ispiri - Added an align, because the objcopy tool
- * incorrectly converts sections that are not long word aligned.
- */
- . = ALIGN(4);
-
- _erodata = .;
- } >.sram
- /* After the code we place initialized data (typically initialized
- * global variables). This gets copied into ram by startup code.
- * __data_start and __data_end shows where in ram this should be placed,
- * whereas __data_loadstart and __data_loadend shows where in rom to
- * copy from.
- */
- .data : {
- _data = .;
- *(.data)
- _edata = .;
- } >.sram
__image_copy_end = .;
@@ -99,12 +61,12 @@ SECTIONS
* crt0.S fills between _bss and _ebss with zeroes.
*/
.bss . : {
- . = ALIGN(4);
+ . = ALIGN(8);
_bss = .;
*(.bss)
*(.sbss)
*(COMMON)
- } >.sram
+ }
_ebss = .;
_end = .;