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authorMario Scheithauer <mario.scheithauer@siemens.com>2017-07-25 10:52:41 +0200
committerWerner Zeh <werner.zeh@siemens.com>2017-07-27 13:12:56 +0000
commit38b6100229e97db1441aab779d83e8b9a4c3e464 (patch)
treee5c82a91fb6e371fbcd6f05614dc715eb35520c5
parent806ea08bb2868f44c5c2227dd2ace49dbe6af6a3 (diff)
downloadcoreboot-38b6100229e97db1441aab779d83e8b9a4c3e464.tar.xz
soc/intel/apollolake: Make usage of RAPL selectable
Apollo Lake SoC supports configuration of Running Average Power Limits (RAPL) for package domain. This feature is not required for all APL mainboards. According to the APL SoC EDS Vol 4 chapter 18.4 Power Limiting Control it is not necessary to enable the RAPL algorithm per default. For that reason make the RAPL configuration selectable. Change-Id: Ib737b162f72b76c15e5768859f9099e2e7ef6426 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/20759 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/soc/intel/apollolake/Kconfig8
-rw-r--r--src/soc/intel/apollolake/chip.c5
2 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index a9774dc191..2d8838a497 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -342,4 +342,12 @@ config CPU_BCLK_MHZ
int
default 100
+config APL_SKIP_SET_POWER_LIMITS
+ bool
+ default n
+ help
+ Some Apollo Lake mainboards do not need the Running Average Power
+ Limits (RAPL) algorithm for a constant power management.
+ Set this config option to skip the RAPL configuration.
+
endif
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index f72173da8c..ec4662c7a8 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -223,6 +223,11 @@ static void set_power_limits(void)
uint32_t tdp, min_power, max_power;
uint32_t pl2_val;
+ if (IS_ENABLED(CONFIG_APL_SKIP_SET_POWER_LIMITS)) {
+ printk(BIOS_INFO, "Skip the RAPL settings.\n");
+ return;
+ }
+
if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
return;