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authorPatrick Rudolph <patrick.rudolph@9elements.com>2020-05-01 18:35:36 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-08-11 12:03:09 +0000
commit4e0cd82b5b96ac729654a19eff445b0b4cc10350 (patch)
tree7bc244a6a9295207b41c76908512727390b0348e
parentb5fa9c8200423beb660403b6656fa8fd5d7edc31 (diff)
downloadcoreboot-4e0cd82b5b96ac729654a19eff445b0b4cc10350.tar.xz
nb/intel/sandybridge/raminit: Add comments
Add comments found when testing ECC scrubbing code. This is a cosmetic change. Change-Id: I7975f6070c2002930eec407a6b101a1295495b25 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40947 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 126acbe65e..3527c8e520 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -319,8 +319,14 @@ void dram_dimm_mapping(ramctr_timing *ctrl)
reg |= (dimmB->width / 8 - 1) << 20;
}
- reg |= 1 << 21; /* Rank interleave */
- reg |= 1 << 22; /* Enhanced interleave */
+ /*
+ * Rank interleave: Bit 16 of the physical address space sets
+ * the rank to use in a dual single rank DIMM configuration.
+ * That results in every 64KiB being interleaved between two ranks.
+ */
+ reg |= 1 << 21;
+ /* Enhanced interleave */
+ reg |= 1 << 22;
if ((dimmA && (dimmA->ranks > 0)) || (dimmB && (dimmB->ranks > 0))) {
ctrl->mad_dimm[channel] = reg;