diff options
| author | Barnali Sarkar <barnali.sarkar@intel.com> | 2016-11-29 12:05:28 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-11-30 17:01:55 +0100 |
| commit | 500ba45b2c18a2742188d603808e2812fe6ed437 (patch) | |
| tree | 435b7fd35911baf295ef674f886b2c60a5f2ba21 | |
| parent | 721d1b30907d379b1d1cb095f4157229fcedd433 (diff) | |
| download | coreboot-500ba45b2c18a2742188d603808e2812fe6ed437.tar.xz | |
mainboard/intel/kblrvp: Revert back USB OC pin programming
With commit 2c3054c1(soc/intel/skylake: Add USB Port Over
Current (OC) Pin programming) USB OC pin programming is already
initiated from devicetree.cb, hence remove it from ramstage.c.
BUG=none
BRANCH=none
TEST=Built and booted KBLRVP from USB device
Change-Id: Icb47533aa57f208d5a52560db924169b908c7a88
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/17635
Tested-by: build bot (Jenkins)
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/mainboard/intel/kblrvp/ramstage.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/src/mainboard/intel/kblrvp/ramstage.c b/src/mainboard/intel/kblrvp/ramstage.c index d33c967939..bcd72bc41e 100644 --- a/src/mainboard/intel/kblrvp/ramstage.c +++ b/src/mainboard/intel/kblrvp/ramstage.c @@ -21,21 +21,10 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) { - size_t i; /* Configure pads prior to SiliconInit() in case there's any * dependencies during hardware initialization. */ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); params->CdClock = 3; - - /* Set proper OC for various USB ports*/ - u8 usb2_oc[] = {0x0, 0x2, 0x8, 0x8, 0x2, 0x8, 0x8, 0x8, 0x1, 0x8}; - u8 usb3_oc[] = {0x0, 0x8, 0x8, 0x1, 0x8, 0x8}; - - for (i = 0; i < ARRAY_SIZE(usb2_oc); i++) - params->Usb2OverCurrentPin[i] = usb2_oc[i]; - - for (i = 0; i < ARRAY_SIZE(usb3_oc); i++) - params->Usb3OverCurrentPin[i] = usb3_oc[i]; } static void ioexpander_init(void *unused) |