diff options
author | Iru Cai <mytbk920423@gmail.com> | 2019-01-01 11:01:56 +0800 |
---|---|---|
committer | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 15:10:46 +0800 |
commit | 592d4c23edd510ec304788fefa715958840abcc7 (patch) | |
tree | 69269a1565c31cc6f06c99ab1f5e45a0e486dc75 | |
parent | d9c1ca69a7d867becfcfff929f0fb0ec9dca2eed (diff) | |
download | coreboot-592d4c23edd510ec304788fefa715958840abcc7.tar.xz |
xhci_setup_ss_route
-rw-r--r-- | src/northbridge/intel/haswell/mrc_frags.c | 10 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/pei_usb.asm | 40 |
2 files changed, 14 insertions, 36 deletions
diff --git a/src/northbridge/intel/haswell/mrc_frags.c b/src/northbridge/intel/haswell/mrc_frags.c index 04a98c605a..6e4e4ae572 100644 --- a/src/northbridge/intel/haswell/mrc_frags.c +++ b/src/northbridge/intel/haswell/mrc_frags.c @@ -378,3 +378,13 @@ int freq_sel(int freq) return 29; return 32; } + +void xhci_setup_ss_route(void); +void xhci_setup_ss_route(void) +{ + u32 tmp; + tmp = pci_read_config32(PCI_DEV(0, 0x14, 0), 0xdc) & 0x3f; + pci_update_config32(PCI_DEV(0, 0x14, 0), 0xd8, 0xffffffc0, tmp); /* USB3 SuperSpeed Enable */ + tmp = pci_read_config32(PCI_DEV(0, 0x14, 0), 0xd4) & 0x7fff; + pci_update_config32(PCI_DEV(0, 0x14, 0), 0xd0, 0xffff8000, tmp); /* USB2 Port Routing */ +} diff --git a/src/northbridge/intel/haswell/pei_usb.asm b/src/northbridge/intel/haswell/pei_usb.asm index 845368db7a..80c4913012 100644 --- a/src/northbridge/intel/haswell/pei_usb.asm +++ b/src/northbridge/intel/haswell/pei_usb.asm @@ -9,6 +9,7 @@ extern mrc_sku_type extern ref_fffcb998 extern ref_fffcb99c extern ref_fffcc988 +extern xhci_setup_ss_route mrc_init_usb: push ebp @@ -551,18 +552,7 @@ lea eax, [ebp - 0x1c] call PeiServiceGetBootMode cmp dword [ebp - 0x1c], 0x11 jne short loc_fffaf177 ; jne 0xfffaf177 -mov edx, dword [edi + 0xa00dc] -mov eax, dword [edi + 0xa00d8] -and eax, 0xffffffc0 -and edx, 0x3f -or eax, edx -mov dword [edi + 0xa00d8], eax -mov edx, dword [edi + 0xa00d4] -mov eax, dword [edi + 0xa00d0] -and eax, 0xffff8000 -and edx, 0x7fff -or eax, edx -mov dword [edi + 0xa00d0], eax +call xhci_setup_ss_route jmp near loc_fffaf5ea ; jmp 0xfffaf5ea loc_fffaf177: @@ -573,18 +563,7 @@ je short loc_fffaf1cb ; je 0xfffaf1cb mov eax, dword [edx + 0xf80ac] test eax, 0x10000 je short loc_fffaf1cb ; je 0xfffaf1cb -mov edx, dword [edi + 0xa00dc] -mov eax, dword [edi + 0xa00d8] -and eax, 0xffffffc0 -and edx, 0x3f -or eax, edx -mov dword [edi + 0xa00d8], eax -mov edx, dword [edi + 0xa00d4] -mov eax, dword [edi + 0xa00d0] -and eax, 0xffff8000 -and edx, 0x7fff -or eax, edx -mov dword [edi + 0xa00d0], eax +call xhci_setup_ss_route loc_fffaf1cb: mov ecx, dword [ebp - 0x2c] @@ -1430,18 +1409,7 @@ jmp near loc_fffaef02 ; jmp 0xfffaef02 loc_fffaf9e7: cmp dword [ebp - 0x34], 0 je loc_fffaf44c ; je 0xfffaf44c -mov edx, dword [edi + 0xa00dc] -mov eax, dword [edi + 0xa00d8] -and eax, 0xffffffc0 -and edx, 0x3f -or eax, edx -mov dword [edi + 0xa00d8], eax -mov edx, dword [edi + 0xa00d4] -mov eax, dword [edi + 0xa00d0] -and eax, 0xffff8000 -and edx, 0x7fff -or eax, edx -mov dword [edi + 0xa00d0], eax +call xhci_setup_ss_route loc_fffafa2a: jmp near loc_fffaf44c ; jmp 0xfffaf44c |