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author | Greg Watson <jarrah@users.sourceforge.net> | 2003-07-23 21:38:02 +0000 |
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committer | Greg Watson <jarrah@users.sourceforge.net> | 2003-07-23 21:38:02 +0000 |
commit | 5bed979a9b65f5eb1e4cb0a4fff8bf6fa32f4f77 (patch) | |
tree | 121c5970de5c9b7de13e556858973e5252e9b869 | |
parent | c99bd5f38fed81bfda8ad974aeaa04c21ffe40ab (diff) | |
download | coreboot-5bed979a9b65f5eb1e4cb0a4fff8bf6fa32f4f77.tar.xz |
added post-pci pass
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/boot/hardwaremain.c | 6 | ||||
-rw-r--r-- | src/include/device/chip.h | 1 |
2 files changed, 5 insertions, 2 deletions
diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c index 4bb23fde80..ff0909fd97 100644 --- a/src/boot/hardwaremain.c +++ b/src/boot/hardwaremain.c @@ -166,7 +166,7 @@ void hardwaremain(int boot_complete) hard_reset(); } #endif - init_timer(); + init_timer(); /* needs to be moved into static configuration */ CONFIGURE(CONF_PASS_PRE_PCI); /* pick how to scan the bus. This is first so we can get at memory size. */ @@ -190,6 +190,8 @@ void hardwaremain(int boot_complete) dev_initialize(); post_code(0x89); + CONFIGURE(CONF_PASS_POST_PCI); + mem = get_ramsize(); post_code(0x70); totalmem = 0; @@ -220,7 +222,7 @@ void hardwaremain(int boot_complete) */ lb_mem = write_tables(mem, processor_map); - CONFIGURE(CONF_PASS_PRE_PCI); + CONFIGURE(CONF_PASS_PRE_BOOT); elfboot(lb_mem); } diff --git a/src/include/device/chip.h b/src/include/device/chip.h index 978af8157f..448665ecd0 100644 --- a/src/include/device/chip.h +++ b/src/include/device/chip.h @@ -34,6 +34,7 @@ enum chip_pass { CONF_PASS_PRE_DEVICE_CONFIGURE, CONF_PASS_PRE_DEVICE_ENABLE, CONF_PASS_PRE_DEVICE_INITIALIZE, + CONF_PASS_POST_PCI, CONF_PASS_PRE_BOOT }; |