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authorSubrata Banik <subrata.banik@intel.com>2019-06-13 22:11:46 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-06-16 07:21:18 +0000
commit64e668051c087289ea012eb0f637d2d396af5d6e (patch)
tree548cd44480a486e6a0cbcab41342f421d540acda
parent2f5abf058e031d5f73213b75424f1f8f4832b2b5 (diff)
downloadcoreboot-64e668051c087289ea012eb0f637d2d396af5d6e.tar.xz
soc/intel/common: Fix booting issue without default IGD enabled
This patch ensures to boot platform without onboard GFX (PCI B0:D2:F0) enabled from mainboard devicetree.cb. TEST=Previously platform was dying at "GMADR is not programmed!" with IGD disabled. Change-Id: I8c907ee25db4538a84890f2ccc3187afa86604b8 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33449 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c30
1 files changed, 21 insertions, 9 deletions
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index 4cea21b075..ed9ae00bf8 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -33,15 +33,18 @@ __weak void graphics_soc_init(struct device *dev)
pci_dev_init(dev);
}
-static uintptr_t graphics_get_bar(unsigned long index)
+static int is_graphics_disabled(struct device *dev)
{
- struct device *dev = SA_DEV_IGD;
- struct resource *gm_res;
- assert(dev != NULL);
-
/* Check if Graphics PCI device is disabled */
if (!dev || !dev->enabled)
- return 0;
+ return 1;
+
+ return 0;
+}
+
+static uintptr_t graphics_get_bar(struct device *dev, unsigned long index)
+{
+ struct resource *gm_res;
gm_res = find_resource(dev, index);
if (!gm_res)
@@ -52,11 +55,16 @@ static uintptr_t graphics_get_bar(unsigned long index)
uintptr_t graphics_get_memory_base(void)
{
+ uintptr_t memory_base;
+ struct device *dev = SA_DEV_IGD;
+
+ if (is_graphics_disabled(dev))
+ return 0;
/*
* GFX PCI config space offset 0x18 know as Graphics
* Memory Range Address (GMADR)
*/
- uintptr_t memory_base = graphics_get_bar(PCI_BASE_ADDRESS_2);
+ memory_base = graphics_get_bar(dev, PCI_BASE_ADDRESS_2);
if (!memory_base)
die_with_post_code(POST_HW_INIT_FAILURE,
"GMADR is not programmed!");
@@ -66,14 +74,18 @@ uintptr_t graphics_get_memory_base(void)
static uintptr_t graphics_get_gtt_base(void)
{
+ static uintptr_t gtt_base;
+ struct device *dev = SA_DEV_IGD;
+
+ if (is_graphics_disabled(dev))
+ die("IGD is disabled!");
/*
* GFX PCI config space offset 0x10 know as Graphics
* Translation Table Memory Mapped Range Address
* (GTTMMADR)
*/
- static uintptr_t gtt_base;
if (!gtt_base) {
- gtt_base = graphics_get_bar(PCI_BASE_ADDRESS_0);
+ gtt_base = graphics_get_bar(dev, PCI_BASE_ADDRESS_0);
if (!gtt_base)
die_with_post_code(POST_HW_INIT_FAILURE,
"GTTMMADR is not programmed!");