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authorAndrey Petrov <andrey.petrov@intel.com>2016-05-15 22:12:35 -0700
committerAaron Durbin <adurbin@chromium.org>2016-05-18 07:05:32 +0200
commit664d585882a8c2404ab1977486c60ae12e985938 (patch)
treec0df98af6e065074208120279d173573644807e8
parent0e46307574befc7dab190438692c497b57c820c2 (diff)
downloadcoreboot-664d585882a8c2404ab1977486c60ae12e985938.tar.xz
soc/intel/apollolake: Remove hardcode for TCO watchdog timer
Change-Id: Ie528b0ee3d447dcb819ccb7c0f832885da0f4257 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/14820 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/soc/intel/apollolake/include/soc/pm.h1
-rw-r--r--src/soc/intel/apollolake/romstage.c6
2 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index fe7a4230e9..6b12886c07 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -89,6 +89,7 @@
#define TCO_STS 0x64
#define TCO_TIMEOUT (1 << 3)
#define TCO1_CNT 0x68
+#define TCO_TMR_HLT (1 << 11)
#define GPE0_REG_MAX 4
#define GPE0_REG_SIZE 32
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index da537996dc..cfef483d67 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -94,9 +94,9 @@ static void disable_watchdog(void)
uint32_t reg;
/* Stop TCO timer */
- reg = inl(ACPI_PMIO_BASE + 0x68);
- reg |= 1 << 11;
- outl(reg, ACPI_PMIO_BASE + 0x68);
+ reg = inl(ACPI_PMIO_BASE + TCO1_CNT);
+ reg |= TCO_TMR_HLT;
+ outl(reg, ACPI_PMIO_BASE + TCO1_CNT);
}
static void migrate_power_state(int is_recovery)