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authorAngel Pons <th3fanbus@gmail.com>2020-06-17 20:24:48 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-08 22:29:26 +0000
commit6c82012e5eaa2ddcb7a84bec15ff9bf48d9c735c (patch)
tree425d793721e02bb5b485a7239484e05c38b215a5
parent279ace666991855330b10d965a6a497f1a018432 (diff)
downloadcoreboot-6c82012e5eaa2ddcb7a84bec15ff9bf48d9c735c.tar.xz
mb/asus/p8z77-v_lx2: Correct Super I/O GPIO settings
Compared against superiotool dumps with vendor firmware. Still boots. Change-Id: I49f36b2805e36695d7a53865e87dfafdb897594e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42482 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/asus/p8z77-v_lx2/devicetree.cb10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/mainboard/asus/p8z77-v_lx2/devicetree.cb b/src/mainboard/asus/p8z77-v_lx2/devicetree.cb
index 8f51e15a09..33ff961522 100644
--- a/src/mainboard/asus/p8z77-v_lx2/devicetree.cb
+++ b/src/mainboard/asus/p8z77-v_lx2/devicetree.cb
@@ -68,13 +68,15 @@ chip northbridge/intel/sandybridge
device pnp 2e.6 off end # CIR
device pnp 2e.7 off end # GPIO6-8
device pnp 2e.8 off end # WDT1, GPIO0, GPIO1
- device pnp 2e.108 on end # GPIO0
- device pnp 2e.9 off end # GPIO1-8
+ device pnp 2e.108 off end # GPIO0
+ device pnp 2e.9 off end # GPIO8
device pnp 2e.109 off end # GPIO1
- device pnp 2e.209 off end # GPIO2
+ device pnp 2e.209 on # GPIO2
+ irq 0xe0 = 0xff
+ end
device pnp 2e.309 off end # GPIO3
device pnp 2e.409 off end # GPIO4
- device pnp 2e.509 on end # GPIO5
+ device pnp 2e.509 off end # GPIO5
device pnp 2e.609 off end # GPIO6
device pnp 2e.709 off end # GPIO7
device pnp 2e.a on end # ACPI