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authorFrans Hendriks <fhendriks@eltan.com>2018-10-29 14:30:58 +0100
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-10-29 14:27:16 +0000
commit6cc937e687d8761bcdf26a0b5a122c392238d10c (patch)
tree66815d0641a75e921711b7063660b9f3e84ee9bb
parent9b83f760cdf887421fcee533a7a8ef310ebb6fae (diff)
downloadcoreboot-6cc937e687d8761bcdf26a0b5a122c392238d10c.tar.xz
src/drivers/pc80/tpm/tis.c: Dont use port value when invalid.
port is allocated in ACPI, without checking for value. Don't use port value when zero. BUG=N/A TEST=Portwell PQ-M107 Change-Id: Ia44281b82d003b29bffbf985b774ddd661b65c4e Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/29331 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
-rw-r--r--src/drivers/pc80/tpm/tis.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c
index 6b84614c88..f7d9d6f152 100644
--- a/src/drivers/pc80/tpm/tis.c
+++ b/src/drivers/pc80/tpm/tis.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
+ * Copyright (C) 2018 Eltan B.V.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -911,7 +912,8 @@ static void lpc_tpm_fill_ssdt(struct device *dev)
acpigen_write_name("_CRS");
acpigen_write_resourcetemplate_header();
acpigen_write_mem32fixed(1, CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000);
- acpigen_write_io16(port, port, 1, 2, 1);
+ if (port)
+ acpigen_write_io16(port, port, 1, 2, 1);
if (CONFIG_TPM_PIRQ) {
/*