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authorChristian Walter <christian.walter@9elements.com>2019-07-31 16:23:53 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2019-08-06 12:07:39 +0000
commit6d2dbe11ae1f4ae21b3f15699831e53d47e270cd (patch)
tree16197c79df4a2f464924187c8a0750b01ca77639
parent9c0fe34511354175e960cf3d7f79afc7b1fd3438 (diff)
downloadcoreboot-6d2dbe11ae1f4ae21b3f15699831e53d47e270cd.tar.xz
tegra210: Increase size of verstage due to overflow
When imlpementing changes in VBOOT, within the build process, tegra210 overflows into the romstage. Reduce the size of romstage from 104 to 100 and increase the size from verstage from 66 to 70. Change-Id: Ie00498838a644a6f92881db85833dd0a94b87f53 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34640 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/nvidia/tegra210/include/soc/memlayout.ld16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout.ld b/src/soc/nvidia/tegra210/include/soc/memlayout.ld
index 5d7481b7bb..6d74ab928f 100644
--- a/src/soc/nvidia/tegra210/include/soc/memlayout.ld
+++ b/src/soc/nvidia/tegra210/include/soc/memlayout.ld
@@ -29,17 +29,17 @@ SECTIONS
{
SRAM_START(0x40000000)
PRERAM_CBMEM_CONSOLE(0x40000000, 2K)
- PRERAM_CBFS_CACHE(0x40000800, 32K)
- VBOOT2_WORK(0x40008800, 12K)
- VBOOT2_TPM_LOG(0x4000B800, 2K)
+ PRERAM_CBFS_CACHE(0x40000800, 30K)
+ VBOOT2_WORK(0x40008000, 12K)
+ VBOOT2_TPM_LOG(0x4000B000, 2K)
#if ENV_ARM64
- STACK(0x4000C000, 3K)
+ STACK(0x4000B800, 3K)
#else /* AVP gets a separate stack to avoid any chance of handoff races. */
- STACK(0x4000CC00, 3K)
+ STACK(0x4000C400, 3K)
#endif
- TIMESTAMP(0x4000D800, 2K)
- BOOTBLOCK(0x4000E000, 30K)
- VERSTAGE(0x40015800, 66K)
+ TIMESTAMP(0x4000D000, 2K)
+ BOOTBLOCK(0x4000D800, 30K)
+ VERSTAGE(0x40015000, 68k)
ROMSTAGE(0x40026000, 104K)
SRAM_END(0x40040000)