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authorDaniel Kurtz <djkurtz@chromium.org>2017-04-21 14:10:09 +0800
committerAaron Durbin <adurbin@chromium.org>2017-04-24 22:15:33 +0200
commit7d4f70f76f4190303452e2f1df834229d3882741 (patch)
treeb76c4d8315e62c8b64985119cd64c885392ef410
parent3f98aadacd5ba90d8bf36e448b52d44177760631 (diff)
downloadcoreboot-7d4f70f76f4190303452e2f1df834229d3882741.tar.xz
mainboard/google/eve: Add TPM_TIS_ACPI_INTERRUPT
TPM_TIS_ACPI_INTERRUPT specifies the TPM2 ACPI interrupt used by intel's tis_plat_irq_status() routine. BRANCH=none BUG=b:36786804 TEST=Boot eve w/ serial enabled firmware, verify verstage sees "cr50 TPM". Change-Id: Ifeb09a0a35bff7cd9091f6d027f0065288ca35c9 Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: https://review.coreboot.org/19407 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
-rw-r--r--src/mainboard/google/eve/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/eve/Kconfig b/src/mainboard/google/eve/Kconfig
index 7727a4cad2..2e7a06d413 100644
--- a/src/mainboard/google/eve/Kconfig
+++ b/src/mainboard/google/eve/Kconfig
@@ -39,6 +39,10 @@ config DRIVER_TPM_I2C_ADDR
hex
default 0x50
+config TPM_TIS_ACPI_INTERRUPT
+ int
+ default 64 # GPE0_DW2_00 (GPP_E0)
+
config DRIVER_TPM_I2C_IRQ
int
default 64 # GPE0_DW2_00 (GPP_E0)