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authorIonela Voinescu <ionela.voinescu@imgtec.com>2015-09-15 13:56:30 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-12-31 17:34:48 +0100
commit88357548a20e7850acdd4528b1923d15c728ac09 (patch)
tree32ad4a3a69db17da1d3b96d2b34db3a2fe008e2c
parent56e64598a2ab414c514b45ca6184854d1a67aeb4 (diff)
downloadcoreboot-88357548a20e7850acdd4528b1923d15c728ac09.tar.xz
imgtec/pistachio: I2C: fix base address for I2C clock setup
The base address for the I2C dividers (DIV1 and CLOCKOUT) was erroneously set to the toplevel clock controller base address and not to the correct peripherals clock controller base address. Change-Id: I66bbc1e741bcf6251babee7ddd6376d49d7cb3d1 Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Reviewed-on: https://review.coreboot.org/12771 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
-rw-r--r--src/soc/imgtec/pistachio/clocks.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/imgtec/pistachio/clocks.c b/src/soc/imgtec/pistachio/clocks.c
index 74d241c847..ab316e3f97 100644
--- a/src/soc/imgtec/pistachio/clocks.c
+++ b/src/soc/imgtec/pistachio/clocks.c
@@ -107,9 +107,9 @@
#define UART1CLKOUT_MASK 0x000003FF
/* Definitions for I2C setup */
-#define I2CCLKDIV1_CTRL_ADDR(i) (0xB8144000 + 0x013C + (2*(i)*4))
+#define I2CCLKDIV1_CTRL_ADDR(i) (0xB8144800 + 0x013C + (2*(i)*4))
#define I2CCLKDIV1_MASK 0x0000007F
-#define I2CCLKOUT_CTRL_ADDR(i) (0xB8144000 + 0x0140 + (2*(i)*4))
+#define I2CCLKOUT_CTRL_ADDR(i) (0xB8144800 + 0x0140 + (2*(i)*4))
#define I2CCLKOUT_MASK 0x0000007F
/* Definitions for ROM clock setup */