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authorZheng Bao <zheng.bao@amd.com>2011-01-20 06:28:25 +0000
committerZheng Bao <Zheng.Bao@amd.com>2011-01-20 06:28:25 +0000
commit8ae82e370b7c293ccb6286a209abae79ffc0eb26 (patch)
tree86b08344addfb27cb7bb7482c435bb8b990d9d75
parenta4da254a39cf8d2d98140c12b48b3163192594dd (diff)
downloadcoreboot-8ae82e370b7c293ccb6286a209abae79ffc0eb26.tar.xz
Remove the code for debugging.
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/amd/bimini_fam10/dsdt.asl18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/amd/bimini_fam10/dsdt.asl b/src/mainboard/amd/bimini_fam10/dsdt.asl
index e9a003026a..3ff6dabf88 100644
--- a/src/mainboard/amd/bimini_fam10/dsdt.asl
+++ b/src/mainboard/amd/bimini_fam10/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
0x00010001 /* OEM Revision */
)
{ /* Start of ASL file */
- #include "../../../arch/x86/acpi/debug.asl" /* Include global debug methods if needed */
+ /* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
/* Data to be patched by the BIOS during POST */
/* FIXME the patching is not done yet! */
@@ -842,10 +842,10 @@ DefinitionBlock (
* state of any device in the system.
*/
Method(\_PTS, 1) {
- DBGO("\\_PTS\n")
- DBGO("From S0 to S")
- DBGO(Arg0)
- DBGO("\n")
+ /* DBGO("\\_PTS\n") */
+ /* DBGO("From S0 to S") */
+ /* DBGO(Arg0) */
+ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
if (LEqual(Arg0,3)){
@@ -921,10 +921,10 @@ DefinitionBlock (
* if non-zero the effective S-state the power supply entered
*/
Method(\_WAK, 1) {
- DBGO("\\_WAK\n")
- DBGO("From S")
- DBGO(Arg0)
- DBGO(" to S0\n")
+ /* DBGO("\\_WAK\n") */
+ /* DBGO("From S") */
+ /* DBGO(Arg0) */
+ /* DBGO(" to S0\n") */
/* Re-enable HPET */
Store(1,HPDE)