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authorFrankChu <frank_chu@pegatron.corp-partner.google.com>2020-12-09 15:45:08 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-12-22 16:08:51 +0000
commit8d3c397285f1afd666ff3192e6686be419d41a66 (patch)
tree896ef51aa47679712980b02836975eee9784cfdc
parentafd5fd6d764170504799d59be9e7ef202a618923 (diff)
downloadcoreboot-8d3c397285f1afd666ff3192e6686be419d41a66.tar.xz
mb/google/volteer: Update SPD table for drobit
drobit memory table as follow: value Vendor Part number 0x00 MICRON MT53E512M32D2NP-046 WT:E 0x00 HYNIX H9HCNNNBKMMLXR-NEE 0x01 MICRON MT53E1G32D2NP-046 WT:A 0x02 HYNIX H9HCNNNCPMMLXR-NEE BUG=b:175351914 BRANCH=none TEST=emerge-volteer coreboot Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com> Change-Id: Icd9439f8449856d4ec6798a4e4310dd139bce05f Reviewed-on: https://review.coreboot.org/c/coreboot/+/48496 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/volteer/variants/drobit/Makefile.inc3
-rw-r--r--src/mainboard/google/volteer/variants/drobit/memory.c65
-rw-r--r--src/mainboard/google/volteer/variants/drobit/memory/Makefile.inc6
-rw-r--r--src/mainboard/google/volteer/variants/drobit/memory/dram_id.generated.txt4
-rw-r--r--src/mainboard/google/volteer/variants/drobit/memory/mem_list_variant.txt4
-rw-r--r--src/mainboard/google/volteer/variants/drobit/memory/mem_parts_used.txt4
6 files changed, 80 insertions, 6 deletions
diff --git a/src/mainboard/google/volteer/variants/drobit/Makefile.inc b/src/mainboard/google/volteer/variants/drobit/Makefile.inc
new file mode 100644
index 0000000000..9064208bff
--- /dev/null
+++ b/src/mainboard/google/volteer/variants/drobit/Makefile.inc
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+romstage-y += memory.c
diff --git a/src/mainboard/google/volteer/variants/drobit/memory.c b/src/mainboard/google/volteer/variants/drobit/memory.c
new file mode 100644
index 0000000000..9d8ad405ce
--- /dev/null
+++ b/src/mainboard/google/volteer/variants/drobit/memory.c
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <baseboard/variants.h>
+
+static const struct lpddr4x_cfg delbin_memcfg = {
+ /* DQ byte map */
+ .dq_map = {
+ [0] = {
+ { 3, 2, 1, 0, 4, 5, 7, 6, }, /* DDR0_DQ0[7:0] */
+ { 12, 13, 14, 15, 11, 10, 9, 8 }, /* DDR0_DQ1[7:0] */
+ },
+ [1] = {
+ { 0, 7, 1, 6, 2, 5, 3, 4, }, /* DDR1_DQ0[7:0] */
+ { 8, 15, 14, 9, 12, 10, 13, 11 }, /* DDR1_DQ1[7:0] */
+ },
+ [2] = {
+ { 2, 3, 0, 1, 4, 5, 6, 7, }, /* DDR2_DQ0[7:0] */
+ { 12, 13, 15, 14, 11, 10, 9, 8 }, /* DDR2_DQ1[7:0] */
+ },
+ [3] = {
+ { 7, 0, 1, 6, 5, 4, 2, 3, }, /* DDR3_DQ0[7:0] */
+ { 15, 14, 8, 9, 10, 13, 11, 12 }, /* DDR3_DQ1[7:0] */
+ },
+ [4] = {
+ { 4, 5, 2, 3, 7, 6, 0, 1, }, /* DDR4_DQ0[7:0] */
+ { 12, 13, 15, 14, 11, 10, 8, 9 }, /* DDR4_DQ1[7:0] */
+ },
+ [5] = {
+ { 3, 4, 2, 5, 0, 6, 1, 7, }, /* DDR5_DQ0[7:0] */
+ { 12, 13, 11, 10, 14, 15, 9, 8 }, /* DDR5_DQ1[7:0] */
+ },
+ [6] = {
+ { 3, 2, 1, 0, 7, 4, 5, 6, }, /* DDR6_DQ0[7:0] */
+ { 15, 14, 13, 12, 8, 9, 10, 11 }, /* DDR6_DQ1[7:0] */
+ },
+ [7] = {
+ { 2, 4, 3, 5, 1, 0, 7, 6, }, /* DDR7_DQ0[7:0] */
+ { 14, 15, 9, 8, 12, 10, 11, 13 }, /* DDR7_DQ1[7:0] */
+ },
+ },
+
+ /* DQS CPU<>DRAM map */
+ .dqs_map = {
+ [0] = { 0, 1 }, /* DDR0_DQS[1:0] */
+ [1] = { 0, 1 }, /* DDR1_DQS[1:0] */
+ [2] = { 0, 1 }, /* DDR2_DQS[1:0] */
+ [3] = { 0, 1 }, /* DDR3_DQS[1:0] */
+ [4] = { 0, 1 }, /* DDR4_DQS[1:0] */
+ [5] = { 0, 1 }, /* DDR5_DQS[1:0] */
+ [6] = { 0, 1 }, /* DDR6_DQS[1:0] */
+ [7] = { 0, 1 }, /* DDR7_DQS[1:0] */
+ },
+
+ .ect = 1, /* Enable Early Command Training */
+};
+
+static const struct ddr_memory_cfg board_memcfg = {
+ .mem_type = MEMTYPE_LPDDR4X,
+ .lpddr4_cfg = &delbin_memcfg
+};
+
+const struct ddr_memory_cfg *variant_memory_params(void)
+{
+ return &board_memcfg;
+}
diff --git a/src/mainboard/google/volteer/variants/drobit/memory/Makefile.inc b/src/mainboard/google/volteer/variants/drobit/memory/Makefile.inc
index b0ca2223a8..c0e2fffb6b 100644
--- a/src/mainboard/google/volteer/variants/drobit/memory/Makefile.inc
+++ b/src/mainboard/google/volteer/variants/drobit/memory/Makefile.inc
@@ -1,5 +1,7 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
-## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
-SPD_SOURCES = placeholder.spd.hex
+SPD_SOURCES =
+SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE
+SPD_SOURCES += lp4x-spd-4.hex # ID = 1(0b0001) Parts = MT53E1G32D2NP-046 WT:A
+SPD_SOURCES += lp4x-spd-3.hex # ID = 2(0b0010) Parts = H9HCNNNCPMMLXR-NEE
diff --git a/src/mainboard/google/volteer/variants/drobit/memory/dram_id.generated.txt b/src/mainboard/google/volteer/variants/drobit/memory/dram_id.generated.txt
index fa247902ee..b5bd3ef2b6 100644
--- a/src/mainboard/google/volteer/variants/drobit/memory/dram_id.generated.txt
+++ b/src/mainboard/google/volteer/variants/drobit/memory/dram_id.generated.txt
@@ -1 +1,5 @@
DRAM Part Name ID to assign
+MT53E512M32D2NP-046 WT:E 0 (0000)
+MT53E1G32D2NP-046 WT:A 1 (0001)
+H9HCNNNBKMMLXR-NEE 0 (0000)
+H9HCNNNCPMMLXR-NEE 2 (0010)
diff --git a/src/mainboard/google/volteer/variants/drobit/memory/mem_list_variant.txt b/src/mainboard/google/volteer/variants/drobit/memory/mem_list_variant.txt
new file mode 100644
index 0000000000..b99b811053
--- /dev/null
+++ b/src/mainboard/google/volteer/variants/drobit/memory/mem_list_variant.txt
@@ -0,0 +1,4 @@
+MT53E512M32D2NP-046 WT:E
+MT53E1G32D2NP-046 WT:A
+H9HCNNNBKMMLXR-NEE
+H9HCNNNCPMMLXR-NEE
diff --git a/src/mainboard/google/volteer/variants/drobit/memory/mem_parts_used.txt b/src/mainboard/google/volteer/variants/drobit/memory/mem_parts_used.txt
deleted file mode 100644
index f51b3af398..0000000000
--- a/src/mainboard/google/volteer/variants/drobit/memory/mem_parts_used.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-# This is a CSV file containing a list of memory parts used by this variant.
-# Generate an updated Makefile.inc and dram_id.generated.txt by running the
-# gen_part_id tool from util/spd_tools/ddr4 or util/spd_tools/lp4x
-# See util/spd_tools/{ddr4,lp4x}/README.md for more details and instructions.