summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2015-10-28 20:05:33 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-10-29 15:46:31 +0100
commit8e1f020cee2228ad24a7ee754ce8a139d08477b2 (patch)
treefd844e5a4ed9c33a038f08d84144651e736ff671
parent1d941068d8f3fe34e39139a498f7729129dba496 (diff)
downloadcoreboot-8e1f020cee2228ad24a7ee754ce8a139d08477b2.tar.xz
pcengines/apu1: adapt comments in devicetree to board
Change-Id: I09d2449af9c1562f4f3d5af1e8764b82b6550007 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/12223 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
-rw-r--r--src/mainboard/pcengines/apu1/devicetree.cb12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/pcengines/apu1/devicetree.cb b/src/mainboard/pcengines/apu1/devicetree.cb
index c156d4c203..f3b6863270 100644
--- a/src/mainboard/pcengines/apu1/devicetree.cb
+++ b/src/mainboard/pcengines/apu1/devicetree.cb
@@ -30,10 +30,10 @@ chip northbridge/amd/agesa/family14/root_complex
chip northbridge/amd/agesa/family14 # PCI side of HT root complex
device pci 0.0 on end # Root Complex
device pci 1.0 off end # Internal Graphics P2P bridge 0x980[2456]
- device pci 4.0 on end # PCIE P2P bridge on-board NIC
- device pci 5.0 on end # PCIE P2P bridge
- device pci 6.0 on end # PCIE P2P bridge PCIe slot
- device pci 7.0 on end # PCIE P2P bridge
+ device pci 4.0 on end # PCIE P2P bridge on-board NIC 3
+ device pci 5.0 on end # PCIE P2P bridge on-board NIC 2
+ device pci 6.0 on end # PCIE P2P bridge on-board NIC 1
+ device pci 7.0 on end # PCIE P2P bridge miniPCIe slot 1
device pci 8.0 on end # NB/SB Link P2P bridge
end # agesa northbridge
@@ -77,10 +77,10 @@ chip northbridge/amd/agesa/family14/root_complex
device pnp 2e.e off end
end
end #LPC
- device pci 14.4 on end # PCIB 0x4384
+ device pci 14.4 on end # PCIB 0x4384 always active; pins remapped to gpio by disconnect_pcib = 1
device pci 14.5 off end # OHCI FS/LS USB
#device pci 14.6 off end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699)
- device pci 15.0 on end # PCIe PortA
+ device pci 15.0 on end # PCIe PortA miniPCIe slot 2
device pci 15.1 off end # PCIe PortB
device pci 15.2 off end # PCIe PortC
device pci 15.3 off end # PCIe PortD