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authorZeng Bao <zheng.bao@amd.com>2009-03-25 15:47:58 +0000
committerMarc Jones <marc.jones@amd.com>2009-03-25 15:47:58 +0000
commit951c63f2a5b57bfadbc48d2fca01db8686be8c02 (patch)
treedfc5ad44bb3964f939f62a1551d6b6f7466d0d84
parentb8e2517055d5f8164c6a4070d1e71c789071fc10 (diff)
downloadcoreboot-951c63f2a5b57bfadbc48d2fca01db8686be8c02.tar.xz
The latest ucode patches for Family 10h:
9fh for RB/BL/DA Rev C; 96h for DR Rev B. Signed-off-by: Zeng Bao <zheng.bao@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4028 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/cpu/amd/model_10xxx/mc_patch_01000096.h163
-rw-r--r--src/cpu/amd/model_10xxx/mc_patch_0100009f.h163
2 files changed, 326 insertions, 0 deletions
diff --git a/src/cpu/amd/model_10xxx/mc_patch_01000096.h b/src/cpu/amd/model_10xxx/mc_patch_01000096.h
new file mode 100644
index 0000000000..e45bdf57a2
--- /dev/null
+++ b/src/cpu/amd/model_10xxx/mc_patch_01000096.h
@@ -0,0 +1,163 @@
+/*
+ ============================================================
+ (c) Advanced Micro Devices, Inc., 2004-2009
+
+ The enclosed microcode is intended to be used with AMD
+ Microprocessors. You may copy, view and install the
+ enclosed microcode only for development and deployment of
+ firmware, BIOS, or operating system code for computer
+ systems that contain AMD processors. You are not
+ authorized to use the enclosed microcode for any other
+ purpose.
+
+ THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR
+ IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO
+ WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT,
+ TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES
+ ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE.
+ AMD does not assume any responsibility for any errors which
+ may appear in this microcode or any other related
+ information provided to you by AMD, or result from use of
+ this microcode. AMD is not obligated to furnish, support,
+ or make any further information, software, technical
+ information, know-how, or show-how available related to this
+ microcode.
+
+ The microcode is provided with "RESTRICTED RIGHTS." Use,
+ duplication, or disclosure by the U.S. Government is subject
+ to the restrictions as set forth in FAR 52.227-14 and
+ DFAR252.227-7013, et seq., or its successor. Use of the
+ microcode by the U.S. Government constitutes
+ acknowledgement of AMD's proprietary rights in them.
+ ============================================================
+*/
+
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+0x05, 0x00, 0x2c, 0x40, 0xff, 0x47, 0xf1, 0xff, 0xa1, 0xea, 0x1f, 0xde,
+0xff, 0x9f, 0xe0, 0xff, 0x63, 0xd0, 0x75, 0xf8, 0xc0, 0x3f, 0x80, 0xff,
+0x1f, 0xc0, 0xbf, 0xe1, 0xbf, 0x07, 0x00, 0xfe, 0xfb, 0xff, 0x83, 0xfc,
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+0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
+
+
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diff --git a/src/cpu/amd/model_10xxx/mc_patch_0100009f.h b/src/cpu/amd/model_10xxx/mc_patch_0100009f.h
new file mode 100644
index 0000000000..d59f138268
--- /dev/null
+++ b/src/cpu/amd/model_10xxx/mc_patch_0100009f.h
@@ -0,0 +1,163 @@
+/*
+ ============================================================
+ (c) Advanced Micro Devices, Inc., 2004-2009
+
+ The enclosed microcode is intended to be used with AMD
+ Microprocessors. You may copy, view and install the
+ enclosed microcode only for development and deployment of
+ firmware, BIOS, or operating system code for computer
+ systems that contain AMD processors. You are not
+ authorized to use the enclosed microcode for any other
+ purpose.
+
+ THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR
+ IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO
+ WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT,
+ TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES
+ ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE.
+ AMD does not assume any responsibility for any errors which
+ may appear in this microcode or any other related
+ information provided to you by AMD, or result from use of
+ this microcode. AMD is not obligated to furnish, support,
+ or make any further information, software, technical
+ information, know-how, or show-how available related to this
+ microcode.
+
+ The microcode is provided with "RESTRICTED RIGHTS." Use,
+ duplication, or disclosure by the U.S. Government is subject
+ to the restrictions as set forth in FAR 52.227-14 and
+ DFAR252.227-7013, et seq., or its successor. Use of the
+ microcode by the U.S. Government constitutes
+ acknowledgement of AMD's proprietary rights in them.
+ ============================================================
+*/
+
+0x08, 0x20, 0x17, 0x12, 0x9f, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00,
+0x8b, 0xb7, 0x4e, 0xd0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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