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authorMaxim Polyakov <max.senia.poliak@gmail.com>2019-10-03 17:07:21 +0300
committerPatrick Georgi <pgeorgi@google.com>2019-10-04 16:23:32 +0000
commit9d68cb214488b4f3f7f2bd74c30d674318db4252 (patch)
treed4668a790262aa436066957eaa7b3d047d96b002
parent723591376e1900e9a26ce4781c59d5a3a6289a2c (diff)
downloadcoreboot-9d68cb214488b4f3f7f2bd74c30d674318db4252.tar.xz
soc/skl/vr_config: fix KBL-U GT3 detection bug
Some VR parameter values for KBL-U with GT3 graphics are different from values for other CPUs in this series [1]. However, GT3 iGPU will never be detected, since the igd_id variable is compared with the LPC device PCI ID. The patch fixes this bug. [1] page 109, 7th Generation Intel(R) Processor Families for U/Y Platforms and 8th Generation Intel(R) Processor Family for U Quad Core and Y Dual Core Platforms. Datasheet, Volume 1. January 2019. Document Number: 334661-006 Change-Id: I33527d90550a1de78c9375d3d3b0e046787a559b Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
-rw-r--r--src/soc/intel/skylake/vr_config.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c
index de5ad2ca5c..121a344114 100644
--- a/src/soc/intel/skylake/vr_config.c
+++ b/src/soc/intel/skylake/vr_config.c
@@ -213,7 +213,8 @@ static uint16_t get_sku_icc_max(int domain)
VR_CFG_AMP(31),
};
- if (igd_id == PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22)
+ if ((igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1) ||
+ (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2))
icc_max[VR_IA_CORE] = VR_CFG_AMP(29);
return icc_max[domain];
@@ -285,7 +286,8 @@ static uint16_t get_sku_ac_dc_loadline(const int domain)
VR_CFG_MOHMS(3.1),
};
- if (igd_id == PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22) {
+ if ((igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1) ||
+ (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2)) {
loadline[VR_GT_UNSLICED] = VR_CFG_MOHMS(2);
loadline[VR_GT_SLICED] = VR_CFG_MOHMS(6);
}