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| author | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:14:06 +0000 |
|---|---|---|
| committer | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:14:06 +0000 |
| commit | a07e6ded1c6270d4bb768cc3d6abd7db1990f52e (patch) | |
| tree | 74a571d49031e00b15a38edd6265527b5d3f9a4e | |
| parent | 98d0d30f6b8237f888cd44b33292319e3c167a47 (diff) | |
| download | coreboot-a07e6ded1c6270d4bb768cc3d6abd7db1990f52e.tar.xz | |
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-31
Creator: Yinghai Lu <yhlu@tyan.com>
nvidia onboard lan support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/southbridge/nvidia/ck804/ck804_early_setup.c | 6 | ||||
| -rw-r--r-- | src/southbridge/nvidia/ck804/ck804_nic.c | 11 |
2 files changed, 15 insertions, 2 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804_early_setup.c b/src/southbridge/nvidia/ck804/ck804_early_setup.c index 0d300bbd21..b6838a9f8f 100644 --- a/src/southbridge/nvidia/ck804/ck804_early_setup.c +++ b/src/southbridge/nvidia/ck804/ck804_early_setup.c @@ -164,14 +164,14 @@ static void ck804_early_setup(void) - RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+1 , 2, 0x8c), 0xffff0000, 0x00009880, + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+1 , 2, 0x8c), 0xffff0000, 0x00009000, RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+1 , 2, 0x90), 0xffff000f, 0x000074a0, RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+1 , 2, 0xa0), 0xfffff0ff, 0x00000a00, RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+1 , 2, 0xac), 0xffffff00, 0x00000000, #if CK804_NUM > 1 - RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+1 , 2, 0x8c), 0xffff0000, 0x00009880, + RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+1 , 2, 0x8c), 0xffff0000, 0x00009000, RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+1 , 2, 0x90), 0xffff000f, 0x000074a0, RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+1 , 2, 0xa0), 0xfffff0ff, 0x00000a00, #endif @@ -286,6 +286,7 @@ static void ck804_early_setup(void) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+19, ~(0xff), ((0<<4)|(1<<2)|(0<<0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 3, ~(0xff), ((0<<4)|(1<<2)|(0<<0)), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 3, ~(0xff), ((0<<4)|(1<<2)|(1<<0)), + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+1 , 0, 0xe4), ~(1<<23), (1<<23), #endif #if CK804_USE_ACI == 1 @@ -304,6 +305,7 @@ static void ck804_early_setup(void) RES_PORT_IO_8, CK804B_SYSCTRL_IO_BASE + 0xc0+19, ~(0xff), ((0<<4)|(1<<2)|(0<<0)), RES_PORT_IO_8, CK804B_SYSCTRL_IO_BASE + 0xc0+ 3, ~(0xff), ((0<<4)|(1<<2)|(0<<0)), RES_PORT_IO_8, CK804B_SYSCTRL_IO_BASE + 0xc0+ 3, ~(0xff), ((0<<4)|(1<<2)|(1<<0)), + RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+1 , 0, 0xe4), ~(1<<23), (1<<23), #endif #endif diff --git a/src/southbridge/nvidia/ck804/ck804_nic.c b/src/southbridge/nvidia/ck804/ck804_nic.c index 19b69af465..bb03fa9928 100644 --- a/src/southbridge/nvidia/ck804/ck804_nic.c +++ b/src/southbridge/nvidia/ck804/ck804_nic.c @@ -21,6 +21,17 @@ static void nic_init(struct device *dev) static uint32_t nic_index = 0; + uint8_t *base; + struct resource *res; + + res = find_resource(dev, 0x10); + + base = res->base; + +#define NvRegPhyInterface 0xC0 +#define PHY_RGMII 0x10000000 + + writel(PHY_RGMII, base + NvRegPhyInterface); old = dword = pci_read_config32(dev, 0x30); dword &= ~(0xf); |