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authorZheng Bao <zheng.bao@amd.com>2020-06-09 09:13:24 +0800
committerFelix Held <felix-coreboot@felixheld.de>2020-06-10 01:49:42 +0000
commita4098c759dca00ef47c821032a5effe572083645 (patch)
tree8c4b3f2000cc73bdc902db016b5f19c30f4c1a18
parent56da63c3dc3f50cfac541c779b608e1bae9e635c (diff)
downloadcoreboot-a4098c759dca00ef47c821032a5effe572083645.tar.xz
amd/common: Add the macro definition for patch level MSR
This MSR is used for detecting if the micro code is applied successfully. Change-Id: I060eb1a31f3358341ac0d5b9105e710c351f2ce8 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42212 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/include/cpu/amd/msr.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h
index d23a4bdfb9..606ea23bc0 100644
--- a/src/include/cpu/amd/msr.h
+++ b/src/include/cpu/amd/msr.h
@@ -73,6 +73,7 @@
#define LS_CFG2_MSR 0xC001102D
#define IBS_OP_DATA3_MSR 0xC0011037
+#define MSR_PATCH_LEVEL 0x0000008B
#define CORE_PERF_BOOST_CTRL 0x15c
#endif /* CPU_AMD_MSR_H */