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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-08-14 17:27:27 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-14 17:27:27 +0000 |
| commit | a6f0e1291cd06eb1c226a74d3ee80fcd95079f49 (patch) | |
| tree | b7059394192c0892a87b7821c26efbeb157298fc | |
| parent | 18719f0b071bf33a22e6055ed5992208c1538bc1 (diff) | |
| download | coreboot-a6f0e1291cd06eb1c226a74d3ee80fcd95079f49.tar.xz | |
clean up comment in entry32.inc
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/cpu/x86/32bit/entry32.inc | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 4e0f3b953a..abb4a97236 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -2,15 +2,16 @@ #include <arch/rom_segs.h> -/* .section ".rom.text" */ .code32 + + /* This is the GDT for the ROM stage part of coreboot. It + * is different from the RAM stage GDT which is defined in + * c_start.S + */ + .align 4 .globl gdtptr - - /* This is the gdt for ROMCC/ASM part of coreboot. - * It is different from the gdt in GCC part of coreboot - * which is defined in c_start.S */ gdt: gdtptr: .word gdt_end - gdt -1 /* compute the table limit */ |