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| author | Marc Jones <marcjones@sysproconsulting.com> | 2020-10-11 15:00:36 -0600 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2020-10-19 01:35:50 +0000 |
| commit | b9365ef377ff4fb7957dcb05e02c30f5817444f9 (patch) | |
| tree | b2a2e7c87304533ebaa19927c520f07e6f0f569a | |
| parent | cfb0b6a8ff5bcd7d36f7e83a5c0f72c6a963f0da (diff) | |
| download | coreboot-b9365ef377ff4fb7957dcb05e02c30f5817444f9.tar.xz | |
soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb
platform_fsp_silicon_init_params_cb is called by the fsp driver and
calls mainboard_silicon_init_params which sets the mainboard
PCH GPIOs.
Change-Id: Icf401e76741a6a7484295e999ddd566fe9510898
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46309
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Bryant Ou <bryant.ou.q@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/chip.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c index 11fe44b1b2..c5a8c1cb1c 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.c +++ b/src/soc/intel/xeon_sp/cpx/chip.c @@ -488,9 +488,11 @@ static void xeonsp_cpx_pci_domain_set_resources(struct device *dev) DEV_FUNC_EXIT(dev); } +/* UPD parameters to be initialized before SiliconInit */ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) { - /* not implemented yet */ + + mainboard_silicon_init_params(silupd); } #if CONFIG(HAVE_ACPI_TABLES) |