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authorStefan Reinauer <stepan@coresystems.de>2010-03-17 03:14:54 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-17 03:14:54 +0000
commitbd112980ffcc7d9809dff88b7208e804c54345ab (patch)
tree7385b2ec5f30275205a31c674620e1cb013e9265
parentb319b1778c0546d9fc0777ccb9a0b82291b5a60e (diff)
downloadcoreboot-bd112980ffcc7d9809dff88b7208e804c54345ab.tar.xz
more warning fixes.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5242 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/cpu/intel/socket_PGA370/Kconfig7
-rw-r--r--src/include/reset.h4
-rw-r--r--src/mainboard/digitallogic/adl855pc/Kconfig1
-rw-r--r--src/mainboard/rca/rm4100/Kconfig1
-rw-r--r--src/mainboard/thomson/ip1000/Kconfig1
-rw-r--r--src/mainboard/thomson/ip1000/mainboard_smi.c1
-rw-r--r--src/northbridge/intel/i82830/vga.c2
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx.h2
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx_reset.c1
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx_smi.c5
-rw-r--r--src/superio/smsc/smscsuperio/superio.c2
11 files changed, 24 insertions, 3 deletions
diff --git a/src/cpu/intel/socket_PGA370/Kconfig b/src/cpu/intel/socket_PGA370/Kconfig
index cd3ecd0107..d7e8eb704b 100644
--- a/src/cpu/intel/socket_PGA370/Kconfig
+++ b/src/cpu/intel/socket_PGA370/Kconfig
@@ -22,3 +22,10 @@ config CPU_INTEL_SOCKET_PGA370
bool
select MMX
select UDELAY_TSC
+
+# Not all CPUs for Socket 370 can do SSE2
+config SSE2
+ bool
+ default n
+ depends on CPU_INTEL_SOCKET_PGA370
+
diff --git a/src/include/reset.h b/src/include/reset.h
index fd78189b17..3d72a8cc0a 100644
--- a/src/include/reset.h
+++ b/src/include/reset.h
@@ -1,6 +1,9 @@
#ifndef RESET_H
#define RESET_H
+#if !defined( __ROMCC__ )
+/* ROMCC can't do function prototypes... */
+
#if CONFIG_HAVE_HARD_RESET == 1
void hard_reset(void);
#else
@@ -9,3 +12,4 @@ void hard_reset(void);
void soft_reset(void);
#endif
+#endif
diff --git a/src/mainboard/digitallogic/adl855pc/Kconfig b/src/mainboard/digitallogic/adl855pc/Kconfig
index 58b9f6f034..c44cbe41a5 100644
--- a/src/mainboard/digitallogic/adl855pc/Kconfig
+++ b/src/mainboard/digitallogic/adl855pc/Kconfig
@@ -7,6 +7,7 @@ config BOARD_DIGITALLOGIC_ADL855PC
select SUPERIO_WINBOND_W83627HF
select ROMCC
select HAVE_PIRQ_TABLE
+ select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_1024
config MAINBOARD_DIR
diff --git a/src/mainboard/rca/rm4100/Kconfig b/src/mainboard/rca/rm4100/Kconfig
index 1654128b03..fd54e99556 100644
--- a/src/mainboard/rca/rm4100/Kconfig
+++ b/src/mainboard/rca/rm4100/Kconfig
@@ -9,6 +9,7 @@ config BOARD_RCA_RM4100
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
+ select HAVE_HARD_RESET
select HAVE_SMI_HANDLER
config MAINBOARD_DIR
diff --git a/src/mainboard/thomson/ip1000/Kconfig b/src/mainboard/thomson/ip1000/Kconfig
index 48ab245fd7..3ea2ae926a 100644
--- a/src/mainboard/thomson/ip1000/Kconfig
+++ b/src/mainboard/thomson/ip1000/Kconfig
@@ -9,6 +9,7 @@ config BOARD_THOMSON_IP1000
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
+ select HAVE_HARD_RESET
select HAVE_SMI_HANDLER
config MAINBOARD_DIR
diff --git a/src/mainboard/thomson/ip1000/mainboard_smi.c b/src/mainboard/thomson/ip1000/mainboard_smi.c
index 3e242359ee..39842e0adc 100644
--- a/src/mainboard/thomson/ip1000/mainboard_smi.c
+++ b/src/mainboard/thomson/ip1000/mainboard_smi.c
@@ -22,6 +22,7 @@
#include <arch/io.h>
#include <arch/romcc_io.h>
#include <console/console.h>
+#include <cpu/x86/smm.h>
int mainboard_io_trap_handler(int smif)
{
diff --git a/src/northbridge/intel/i82830/vga.c b/src/northbridge/intel/i82830/vga.c
index 8c1cac0a84..ccab697a89 100644
--- a/src/northbridge/intel/i82830/vga.c
+++ b/src/northbridge/intel/i82830/vga.c
@@ -25,7 +25,9 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cbfs.h>
+#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
#include <x86emu/x86emu.h>
+#endif
static void vga_init(device_t dev)
{
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index 04092966bc..070fb7e4a2 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -36,6 +36,8 @@
extern void i82801dx_enable(device_t dev);
#endif
+#define DEBUG_PERIODIC_SMIS 0
+
#define MAINBOARD_POWER_OFF 0
#define MAINBOARD_POWER_ON 1
#define MAINBOARD_POWER_KEEP 2
diff --git a/src/southbridge/intel/i82801dx/i82801dx_reset.c b/src/southbridge/intel/i82801dx/i82801dx_reset.c
index 3d5c600289..8dbe6cb1d7 100644
--- a/src/southbridge/intel/i82801dx/i82801dx_reset.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_reset.c
@@ -18,6 +18,7 @@
*/
#include <arch/io.h>
+#include <reset.h>
void hard_reset(void)
{
diff --git a/src/southbridge/intel/i82801dx/i82801dx_smi.c b/src/southbridge/intel/i82801dx/i82801dx_smi.c
index b934dcf2bd..a536d8ba76 100644
--- a/src/southbridge/intel/i82801dx/i82801dx_smi.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_smi.c
@@ -24,6 +24,7 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
+#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
@@ -237,7 +238,7 @@ static void smi_set_eos(void)
extern uint8_t smm_relocation_start, smm_relocation_end;
-void smm_relocate(void)
+static void smm_relocate(void)
{
u32 smi_en;
u16 pm1_en;
@@ -317,7 +318,7 @@ void smm_relocate(void)
outb(0x00, 0xb2);
}
-void smm_install(void)
+static void smm_install(void)
{
/* enable the SMM memory window */
pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM,
diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c
index 1a411e3439..b86cd8649e 100644
--- a/src/superio/smsc/smscsuperio/superio.c
+++ b/src/superio/smsc/smscsuperio/superio.c
@@ -345,7 +345,7 @@ static void enable_dev(device_t dev)
/* Enable the specified devices (if present on the chip). */
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
- &pnp_dev_info);
+ &pnp_dev_info[0]);
/* Restore LD_FOO values. */
for (j = 0; j < ARRAY_SIZE(pnp_dev_info); j++)