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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-10-18 17:56:42 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-10-18 17:56:42 +0000 |
| commit | bd7602314bd0a4fb96ddc0b055d503fa67a55303 (patch) | |
| tree | c3f15a95f1f6aa631a323970d0a01340c264d217 | |
| parent | 69a392b5c644518ace86d43d6dd76d52f0c634af (diff) | |
| download | coreboot-bd7602314bd0a4fb96ddc0b055d503fa67a55303.tar.xz | |
Remove hardcoded wait from SPI write/erase routines and check the chip
status register instead.
This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a
MX25L4005 chip.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | util/flashrom/spi.c | 20 |
1 files changed, 2 insertions, 18 deletions
diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c index 7e61b1a14e..26c0d4a023 100644 --- a/util/flashrom/spi.c +++ b/util/flashrom/spi.c @@ -270,17 +270,9 @@ int generic_spi_chip_erase(struct flashchip *flash) generic_spi_write_enable(); /* Send CE (Chip Erase) */ generic_spi_command(1, 0, cmd, NULL); - /* The chip needs some time for erasing, the MX25L4005A has a maximum - * time of 7.5 seconds. - * FIXME: Check the status register instead - * Do we have to check the status register before calling - * write_disable()? The data sheet suggests we don't have to call - * write_disable() at all because WEL is reset automatically. + /* Wait until the Write-In-Progress bit is cleared */ while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP) sleep(1); - */ - generic_spi_write_disable(); - sleep(8); return 0; } @@ -294,17 +286,9 @@ void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) { bios[256 * block + i] = buf[256 * block + i]; } outb(0, it8716f_flashport); - /* The chip needs some time for page program, the MX25L4005A has a - * maximum time of 5 ms. - * FIXME: Check the status register instead. - * Do we have to check the status register before calling - * write_disable()? The data sheet suggests we don't have to call - * write_disable() at all because WEL is reset automatically. + /* Wait until the Write-In-Progress bit is cleared */ while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP) usleep(1000); - */ - generic_spi_write_disable(); - usleep(5000); } void generic_spi_page_program(int block, uint8_t *buf, uint8_t *bios) |